[v2,0/4] intel-m10-bmc: Manage register access to control delay during sec update

Message

Ilpo Järvinen April 17, 2023, 9:16 a.m. UTC

Manage handshake register access on Max 10 FPGA cards that have a major
slowdown on reading handshake registers during secure update prepare and
write phases. The problem does not occur with PMCI-based cards.

The first patch which moves Max M10 symbols into own namespace is
otherwise independent of the other changes but it would conflict with
this series if sent as separate change. Thus, it's part of this series
to give the patches a well-defined order.

Ilpo Järvinen (4):
  mfd: intel-m10-bmc: Move core symbols to own namespace
  mfd: intel-m10-bmc: Create m10bmc_sys_update_bits()
  mfd: intel-m10-bmc: Move m10bmc_sys_read() away from header
  mfd: intel-m10-bmc: Manage access to MAX 10 fw handshake registers

 drivers/fpga/intel-m10-bmc-sec-update.c | 47 +++++++------
 drivers/hwmon/intel-m10-bmc-hwmon.c     |  1 +
 drivers/mfd/intel-m10-bmc-core.c        | 90 ++++++++++++++++++++++++-
 drivers/mfd/intel-m10-bmc-pmci.c        |  1 +
 drivers/mfd/intel-m10-bmc-spi.c         | 15 +++++
 include/linux/mfd/intel-m10-bmc.h       | 43 ++++++++----
 6 files changed, 163 insertions(+), 34 deletions(-)

Comments

Ilpo Järvinen April 17, 2023, 9:19 a.m. UTC | #1

On Mon, 17 Apr 2023, Ilpo Järvinen wrote:

> Manage handshake register access on Max 10 FPGA cards that have a major
> slowdown on reading handshake registers during secure update prepare and
> write phases. The problem does not occur with PMCI-based cards.
> 
> The first patch which moves Max M10 symbols into own namespace is
> otherwise independent of the other changes but it would conflict with
> this series if sent as separate change. Thus, it's part of this series
> to give the patches a well-defined order.
> 
> Ilpo Järvinen (4):
>   mfd: intel-m10-bmc: Move core symbols to own namespace
>   mfd: intel-m10-bmc: Create m10bmc_sys_update_bits()
>   mfd: intel-m10-bmc: Move m10bmc_sys_read() away from header
>   mfd: intel-m10-bmc: Manage access to MAX 10 fw handshake registers
> 
>  drivers/fpga/intel-m10-bmc-sec-update.c | 47 +++++++------
>  drivers/hwmon/intel-m10-bmc-hwmon.c     |  1 +
>  drivers/mfd/intel-m10-bmc-core.c        | 90 ++++++++++++++++++++++++-
>  drivers/mfd/intel-m10-bmc-pmci.c        |  1 +
>  drivers/mfd/intel-m10-bmc-spi.c         | 15 +++++
>  include/linux/mfd/intel-m10-bmc.h       | 43 ++++++++----
>  6 files changed, 163 insertions(+), 34 deletions(-)
> 
> 

Please disregard v2. I'll send v3 shortly. 

(I managed to add the tags into wrong files so they're not correctly 
here in v2).