Show patches with: Archived = No       |   710 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4] selftests: drivers: fpga: A test for interrupt support [v4] selftests: drivers: fpga: A test for interrupt support 1 - - --- 2021-01-25 Tom Rix Needs ACK
dt-bindings: fpga: fpga-region: Convert to sugar syntax dt-bindings: fpga: fpga-region: Convert to sugar syntax - - - --- 2021-04-02 Geert Uytterhoeven Queued
[v4,1/7] fpga-mgr: wrap the write_init() op wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[v4,2/7] fpga-mgr: make write_complete() op optional wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[v4,3/7] fpga-mgr: wrap the write() op wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[v4,4/7] fpga-mgr: wrap the status() op wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[v4,5/7] fpga-mgr: wrap the state() op wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[v4,6/7] fpga-mgr: wrap the fpga_remove() op wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[v4,7/7] fpga-mgr: wrap the write_sg() op wrappers for fpga_manager_ops - - - --- 2021-06-25 Tom Rix Queued
[1/4] fpga: altera-freeze-bridge: Address warning about unused variable FPGA Manager address unused variable warnings - - - --- 2021-07-02 Moritz Fischer Queued
[2/4] fpga: xiilnx-spi: Address warning about unused variable FPGA Manager address unused variable warnings - - - --- 2021-07-02 Moritz Fischer Queued
[3/4] fpga: xilinx-pr-decoupler: Address warning about unused variable FPGA Manager address unused variable warnings - - - --- 2021-07-02 Moritz Fischer Queued
[4/4] fpga: zynqmp-fpga: Address warning about unused variable FPGA Manager address unused variable warnings - - - --- 2021-07-02 Moritz Fischer Queued
[3/5] of: Add vendor prefix for Lattice Semiconductor 3 - - --- 2017-02-27 Alan Tull Superseded
[v4,1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler 1 - - --- 2017-03-24 Moritz Fischer Superseded
[1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler 1 - - --- 2017-03-24 Alan Tull Superseded
[2/2] fpga: Add support for Xilinx LogiCORE PR Decoupler 1 - - --- 2017-03-24 Alan Tull Superseded
fpga fr br: fix warning for unexpected version number - - - --- 2017-04-05 matthew.gerlach@linux.intel.com Superseded
[PATCHv3,1/7] dt-bindings, firmware: add Intel Stratix10 service layer binding - - - --- 2018-03-27 Richard Gong Superseded
[PATCHv3,2/7] arm64: dts: stratix10: add service driver binding to base dtsi - - - --- 2018-03-27 Richard Gong Superseded
[PATCHv3,3/7] driver, misc: add Intel Stratix10 service layer driver - - - --- 2018-03-27 Richard Gong Superseded
[PATCHv3,4/7] dt-bindings: fpga: add Stratix10 SoC FPGA manager binding - - - --- 2018-03-27 Richard Gong Superseded
[PATCHv3,5/7] arm64: dts: stratix10: add fpga manager and region - - - --- 2018-03-27 Richard Gong Superseded
[PATCHv3,6/7] fpga: add intel stratix10 soc fpga manager driver - - - --- 2018-03-27 Richard Gong Superseded
[PATCHv3,7/7] defconfig: enable fpga and service layer - - - --- 2018-03-27 Richard Gong Superseded
[RFC,v2,1/3] firmware: xilinx: Add fpga API's Add Bitstream configuration support for ZynqMP - - - --- 2018-09-05 Nava kishore Manne Superseded
[RFC,v2,2/3] dt-bindings: fpga: Add bindings for ZynqMP fpga driver Add Bitstream configuration support for ZynqMP - - - --- 2018-09-05 Nava kishore Manne Superseded
[RFC,v2,3/3] fpga manager: Adding FPGA Manager support for Xilinx zynqmp Add Bitstream configuration support for ZynqMP - - - --- 2018-09-05 Nava kishore Manne Superseded
[Bug] altera_cvp registers a PCI device (Altera/Intel FPGA) without verifying that it supports CVP [Bug] altera_cvp registers a PCI device (Altera/Intel FPGA) without verifying that it supports CVP - - - --- 2018-10-19 Andreas Puhm Superseded
fpga: altera_cvp: restrict registration to CvP enabled devices fpga: altera_cvp: restrict registration to CvP enabled devices - - - --- 2018-10-22 Andreas Puhm Superseded
[v2,1/3] firmware: xilinx: Add fpga API's Add Bitstream configuration support for ZynqMP - - - --- 2018-10-25 Nava kishore Manne Superseded
[v2,2/3] dt-bindings: fpga: Add bindings for ZynqMP fpga driver Add Bitstream configuration support for ZynqMP - - - --- 2018-10-25 Nava kishore Manne Superseded
[v2,3/3] fpga manager: Adding FPGA Manager support for Xilinx zynqmp Add Bitstream configuration support for ZynqMP - - - --- 2018-10-25 Nava kishore Manne Superseded
[v4] fpga: mgr: altera-ps-spi: enable usage on non-dt platforms [v4] fpga: mgr: altera-ps-spi: enable usage on non-dt platforms - - - --- 2018-11-15 Anatolij Gustschin Superseded
[v2] fpga: dfl: expand minor range when registering chrdev region [v2] fpga: dfl: expand minor range when registering chrdev region 1 - - --- 2019-02-21 Chengguang Xu atull Superseded
drivers: fpga: Kconfig: pedantic cleanups drivers: fpga: Kconfig: pedantic cleanups - - - --- 2019-03-06 Enrico Weigelt, metux IT consult Superseded
fpga: dfl: afu: Pass the correct device to dma_mapping_error() fpga: dfl: afu: Pass the correct device to dma_mapping_error() 3 - - --- 2019-04-10 Scott Wood atull Superseded
fpga: dfl: Add lockdep classes for pdata->lock fpga: dfl: Add lockdep classes for pdata->lock 1 - - --- 2019-04-10 Scott Wood Superseded
[v2] fpga: dfl: Add lockdep classes for pdata->lock [v2] fpga: dfl: Add lockdep classes for pdata->lock - - - --- 2019-04-12 Scott Wood atull Superseded
[14/57] docs: fpga: convert it to ReST Convert files to ReST - - - --- 2019-04-16 Mauro Carvalho Chehab Superseded
[v2,14/79] docs: fpga: convert docs to ReST and rename to *.rst Untitled series #108599 - - - --- 2019-04-22 Mauro Carvalho Chehab Superseded
fpga: stratix10-soc: fix use-after-free on s10_init() fpga: stratix10-soc: fix use-after-free on s10_init() - 2 - --- 2019-04-23 Wen Yang atull Superseded
[v2] fpga: zynqmp-fpga: Correctly handle error pointer [v2] fpga: zynqmp-fpga: Correctly handle error pointer 1 - - --- 2019-05-07 Moritz Fischer Superseded
[v4,1/3] Documentation: fpga: dfl: add descriptions for thermal/power management interfaces add thermal/power management features for FPGA DFL drivers - - - --- 2019-06-27 Wu, Hao Superseded
[4/5] dt-bindings: fpga: xilinx-slave-serial: add optional INIT_B GPIO [1/5] dt-bindings: fpga: xilinx-slave-serial: valid for the 7 Series too - - - --- 2020-06-11 Luca Ceresoli Superseded
[5/5] fpga manager: xilinx-spi: check INIT_B pin during write_init [1/5] dt-bindings: fpga: xilinx-slave-serial: valid for the 7 Series too - - - --- 2020-06-11 Luca Ceresoli Superseded
[1/3] fpga manager: xilinx-spi: remove stray comment [1/3] fpga manager: xilinx-spi: remove stray comment - - - --- 2020-08-17 Luca Ceresoli Superseded
[2/3] fpga manager: xilinx-spi: provide better diagnostics on programming failure [1/3] fpga manager: xilinx-spi: remove stray comment - 1 - --- 2020-08-17 Luca Ceresoli Superseded
[3/3] fpga manager: xilinx-spi: remove final dot from dev_err() strings [1/3] fpga manager: xilinx-spi: remove stray comment - - - --- 2020-08-17 Luca Ceresoli Superseded
[v3,1/7] fpga: sec-mgr: intel fpga security manager class driver Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v3,2/7] fpga: sec-mgr: enable secure updates Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v3,3/7] fpga: sec-mgr: expose sec-mgr update status Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v3,4/7] fpga: sec-mgr: expose sec-mgr update errors Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v3,5/7] fpga: sec-mgr: expose sec-mgr update size Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v3,6/7] fpga: sec-mgr: enable cancel of secure update Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v3,7/7] fpga: sec-mgr: expose hardware error info Intel FPGA Security Manager Class Driver - 1 - --- 2020-10-07 Russ Weight Superseded
[v8,1/2] fpga: dfl: add the userspace I/O device support for DFL devices UIO support for dfl devices 1 1 - --- 2021-01-21 Xu Yilun Superseded
[v8,2/2] Documentation: fpga: dfl: Add description for DFL UIO support UIO support for dfl devices - - - --- 2021-01-21 Xu Yilun Superseded
[v3,1/3] fpga: mgr: Use standard dev_release for class driver fpga: Use standard class dev_release function - - - --- 2021-05-24 Russ Weight Superseded
[v3,2/3] fpga: bridge: Use standard dev_release for class driver fpga: Use standard class dev_release function - - - --- 2021-05-24 Russ Weight Superseded
[v3,3/3] fpga: region: Use standard dev_release for class driver fpga: Use standard class dev_release function - - - --- 2021-05-24 Russ Weight Superseded
[v1,1/5] fpga: mgr: Use standard dev_release for class driver fpga: Populate dev_release functions - - - --- 2021-06-09 Russ Weight Superseded
[v1,2/5] fpga: altera-pr-ip: Remove fpga_mgr_unregister() call fpga: Populate dev_release functions - - - --- 2021-06-09 Russ Weight Superseded
[v1,3/5] fpga: stratix10-soc: Add missing fpga_mgr_free() call fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[v1,4/5] fpga: bridge: Use standard dev_release for class driver fpga: Populate dev_release functions - - - --- 2021-06-09 Russ Weight Superseded
[v1,5/5] fpga: region: Use standard dev_release for class driver fpga: Populate dev_release functions - - - --- 2021-06-09 Russ Weight Superseded
[1/7] fpga: dfl: reorganize to subdir layout fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[2/7] fpga: xilinx: reorganize to subdir layout fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[1/7] fpga: dfl: reorganize to subdir layout fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[2/7] fpga: xilinx: reorganize to subdir layout fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[3/7] fpga: altera: reorganize to subdir layout fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[4/7] fpga: lattice: reorganize to subdir layout fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[5/7] fpga: dfl: remove dfl- prefix on files fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[6/7] fpga: xilinx: remove xilinx- prefix on files fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[7/7] fpga: altera: remove altera- prefix on files fpga: reorganize to subdirs - - - --- 2021-06-09 Tom Rix Superseded
[v2,3/8] fpga: mgr: Rename dev to parent for parent device fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[v2,4/8] fpga: bridge: Rename dev to parent for parent device fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[v2,5/8] fpga: region: Rename dev to parent for parent device fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[v2,6/8] fpga: mgr: Use standard dev_release for class driver fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[v2,7/8] fpga: bridge: Use standard dev_release for class driver fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[v2,8/8] fpga: region: Use standard dev_release for class driver fpga: Populate dev_release functions - 1 - --- 2021-06-09 Russ Weight Superseded
[2/3] fpga: altera_freeze_bridge: remove restriction to socfpga patches for FPGA - 1 - --- 2019-01-24 Alan Tull atull Awaiting Upstream
[3/3] fpga: mgr: altera-ps-spi: make array dummy static, shrinks object size patches for FPGA 2 - - --- 2019-01-24 Alan Tull atull Awaiting Upstream
[01/15] fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address. FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[02/15] fpga: dfl: fme: remove copy_to_user() in ioctl for PR FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[03/15] fpga: dfl: fme: align PR buffer size per PR datawidth FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[04/15] fpga: dfl: fme: support 512bit data width PR FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[05/15] Documentation: fpga: dfl: add descriptions for virtualization and new interfaces. FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[06/15] fpga: dfl: fme: add DFL_FPGA_FME_PORT_RELEASE/ASSIGN ioctl support. FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[07/15] fpga: dfl: pci: enable SRIOV support. FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[08/15] fpga: dfl: afu: add AFU state related sysfs interfaces FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[09/15] fpga: dfl: afu: add userclock sysfs interfaces. FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[10/15] fpga: dfl: add id_table for dfl private feature driver FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[11/15] fpga: dfl: afu: export __port_enable/disable function. FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[12/15] fpga: dfl: afu: add error reporting support. FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[13/15] fpga: dfl: afu: add STP (SignalTap) support FPGA DFL updates 2 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[14/15] fpga: dfl: fme: add capability sysfs interfaces FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
[15/15] fpga: dfl: fme: add global error reporting support FPGA DFL updates 1 - - --- 2019-06-28 Moritz Fischer Awaiting Upstream
fpga-manager: altera-ps-spi: Fix build error fpga-manager: altera-ps-spi: Fix build error 1 - - --- 2019-07-08 YueHaibing m0reeze Awaiting Upstream
[v5,1/9] fpga: dfl: make init callback optional FPGA DFL updates 1 - - --- 2019-08-12 Wu, Hao Awaiting Upstream
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