| Message ID | 1487600724-17607-2-git-send-email-agust@denx.de (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
On Mon, Feb 20, 2017 at 6:25 AM, Anatolij Gustschin <agust@denx.de> wrote: > Add dt binding documentation details for Xilinx FPGA configuration > over slave serial interface. > > Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Moritz Fischer <mdf@kernel.org> > --- > Changes in v2: > > - correct gpios properties in example to match above description > > - use fpga-mgr@0 instead of fpga-spi@0 in example > > .../bindings/fpga/xilinx-slave-serial.txt | 24 ++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > > diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > new file mode 100644 > index 0000000..20b0731 > --- /dev/null > +++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > @@ -0,0 +1,24 @@ > +Xilinx Slave Serial SPI FPGA Manager > + > +Xilinx Spartan-6 FPGAs support a method of loading the bitstream over > +what is referred to as "slave serial" interface. > +The slave serial link is not technically SPI, and might require extra > +circuits in order to play nicely with other SPI slaves on the same bus. > + > +See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf > + > +Required properties: > +- compatible: should contain "xlnx,fpga-slave-serial" > +- reg: spi chip select of the FPGA > +- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual) > +- done-gpios: config status pin (referred to as DONE in the manual) > + > +Example: > + fpga_mgr_spi: fpga-mgr@0 { > + compatible = "xlnx,fpga-slave-serial"; > + spi-max-frequency = <60000000>; > + spi-cpha; > + reg = <0>; > + done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; > + prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; > + }; > -- > 2.7.4 > -- To unsubscribe from this list: send the line "unsubscribe linux-fpga" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt new file mode 100644 index 0000000..20b0731 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt @@ -0,0 +1,24 @@ +Xilinx Slave Serial SPI FPGA Manager + +Xilinx Spartan-6 FPGAs support a method of loading the bitstream over +what is referred to as "slave serial" interface. +The slave serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf + +Required properties: +- compatible: should contain "xlnx,fpga-slave-serial" +- reg: spi chip select of the FPGA +- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual) +- done-gpios: config status pin (referred to as DONE in the manual) + +Example: + fpga_mgr_spi: fpga-mgr@0 { + compatible = "xlnx,fpga-slave-serial"; + spi-max-frequency = <60000000>; + spi-cpha; + reg = <0>; + done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + };
Add dt binding documentation details for Xilinx FPGA configuration over slave serial interface. Signed-off-by: Anatolij Gustschin <agust@denx.de> --- Changes in v2: - correct gpios properties in example to match above description - use fpga-mgr@0 instead of fpga-spi@0 in example .../bindings/fpga/xilinx-slave-serial.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt