diff mbox series

[v3,2/5] fpga: dfl: fix the definitions of type & feature_id for dfl devices

Message ID 1600966801-30586-3-git-send-email-yilun.xu@intel.com (mailing list archive)
State Superseded, archived
Headers show
Series add DFL bus support to MODULE_DEVICE_TABLE() | expand

Commit Message

Xu Yilun Sept. 24, 2020, 4:59 p.m. UTC
The value of the field fpga_dfl_device.type comes from the 12 bits
register field DFH_ID according to DFL spec. So this patch changes the
definition of the type field to u16.

Also it is not necessary to illustrate the valid bits of the type field
in comments. Instead we should explicitly define the possible values in
the enumeration type for it, because they are shared by hardware spec.
We should not let the compiler decide these values.

Similar changes are also applied to fpga_dfl_device.feature_id.

This patch also fixed the MODALIAS format according to the changes
above.

Signed-off-by: Xu Yilun <yilun.xu@intel.com>
---
 drivers/fpga/dfl.c |  3 +--
 drivers/fpga/dfl.h | 16 +++++++---------
 2 files changed, 8 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index f146cda..a906fa7 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -299,8 +299,7 @@  static int fpga_dfl_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
 {
 	struct fpga_dfl_device *fddev = to_fpga_dfl_dev(dev);
 
-	/* The type has 4 valid bits and feature_id has 12 valid bits */
-	return add_uevent_var(env, "MODALIAS=fpga-dfl:t%01Xf%03X",
+	return add_uevent_var(env, "MODALIAS=fpga-dfl:t%04Xf%04X",
 			      fddev->type, fddev->feature_id);
 }
 
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index ba930a7..78f7c6f 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -520,21 +520,19 @@  long dfl_feature_ioctl_set_irq(struct platform_device *pdev,
  * enum fpga_dfl_id_type - define the FPGA DFL FIU types
  */
 enum fpga_dfl_id_type {
-	FPGA_DFL_FME_ID,
-	FPGA_DFL_PORT_ID,
+	FPGA_DFL_FME_ID = 0,
+	FPGA_DFL_PORT_ID = 1,
 	FPGA_DFL_ID_MAX,
 };
 
 /**
  * struct fpga_dfl_device_id - fpga dfl device identifier
- * @type: contains 4 bits FPGA DFL FIU type of the device, see
- *	  enum fpga_dfl_id_type.
- * @feature_id: contains 12 bits feature identifier local to its FPGA DFL FIU
- *		type.
+ * @type: FPGA DFL FIU type of the device, see enum fpga_dfl_id_type.
+ * @feature_id: feature identifier local to its FPGA DFL FIU type.
  * @driver_data: driver specific data.
  */
 struct fpga_dfl_device_id {
-	u8 type;
+	u16 type;
 	u16 feature_id;
 	unsigned long driver_data;
 };
@@ -545,7 +543,7 @@  struct fpga_dfl_device_id {
  * @dev: generic device interface.
  * @id: id of the fpga dfl device.
  * @type: FPGA DFL FIU type of the device, see enum fpga_dfl_id_type.
- * @feature_id: 16 bits feature identifier local to its FPGA DFL FIU type.
+ * @feature_id: feature identifier local to its FPGA DFL FIU type.
  * @mmio_res: mmio resource of this fpga dfl device.
  * @irqs: list of Linux IRQ numbers of this fpga dfl device.
  * @num_irqs: number of IRQs supported by this fpga dfl device.
@@ -555,7 +553,7 @@  struct fpga_dfl_device_id {
 struct fpga_dfl_device {
 	struct device dev;
 	int id;
-	u8 type;
+	u16 type;
 	u16 feature_id;
 	struct resource mmio_res;
 	int *irqs;