| Message ID | 1607916981-14782-3-git-send-email-yilun.xu@intel.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | UIO support for dfl devices | expand |
On 12/13/20 7:36 PM, Xu Yilun wrote: > This patch adds description for UIO support for dfl devices on DFL > bus. > > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > --- > v2: no doc in v1, add it for v2. > --- > Documentation/fpga/dfl.rst | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) Should add your self in the authors list. > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 0404fe6..a15e81e 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -502,6 +502,29 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) > could be a reference. > > > +UIO support for DFL devices > +=========================== > +The FPGA is open for users to be reprogramed with newly developed hardware The purpose of an FPGA is to be reprogrammed with newly developed hardware components. New hardware can > +components. They could instantiate a new private feature in the DFL, and then > +get a DFL device in their system. In some cases users may need a userspace > +driver for the DFL device: > + > +* Users may need to run some diagnostic test for their hardwares. * Users may prototype the kernel driver in user space. > +* Some hardware is designed for specific purposes and does not fit into one of > + the standard kernel subsystems. > + > +This requires the direct access to the MMIO space and interrupt handling in > +userspace. We implemented a dfl-uio-pdev module which exposes the UIO device The dfl-uio-pdev module exposes > +interfaces. It adds the uio_pdrv_genirq platform device with the resources of > +the DFL device, and let the generic UIO platform device driver provide UIO the DLF device, and lets > +support to userspace. Use FPGA_DFL_UIO_PDEV to enable this feature. > + > +The DFL UIO driver has a special matching algorithem. It will match any DFL > +device which could not be handled by other DFL drivers. In this way, it will > +not impact the functionality of the features which are already supported by the > +system. (not sure if this section is needed) > + > + > Open discussion > =============== > FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration
On Mon, Dec 14, 2020 at 02:14:56PM -0800, Tom Rix wrote: > > On 12/13/20 7:36 PM, Xu Yilun wrote: > > This patch adds description for UIO support for dfl devices on DFL > > bus. > > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > > --- > > v2: no doc in v1, add it for v2. > > --- > > Documentation/fpga/dfl.rst | 23 +++++++++++++++++++++++ > > 1 file changed, 23 insertions(+) > Should add your self in the authors list. OK. > > > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > > index 0404fe6..a15e81e 100644 > > --- a/Documentation/fpga/dfl.rst > > +++ b/Documentation/fpga/dfl.rst > > @@ -502,6 +502,29 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) > > could be a reference. > > > > > > +UIO support for DFL devices > > +=========================== > > +The FPGA is open for users to be reprogramed with newly developed hardware > > The purpose of an FPGA is to be reprogrammed with newly developed hardware > > components. New hardware can Will change it. > > > +components. They could instantiate a new private feature in the DFL, and then > > +get a DFL device in their system. In some cases users may need a userspace > > +driver for the DFL device: > > + > > +* Users may need to run some diagnostic test for their hardwares. > * Users may prototype the kernel driver in user space. Could we just add the line rather than replacing the previous line? I think this comment is describing a different usecase. > > +* Some hardware is designed for specific purposes and does not fit into one of > > + the standard kernel subsystems. > > + > > +This requires the direct access to the MMIO space and interrupt handling in > > +userspace. We implemented a dfl-uio-pdev module which exposes the UIO device > The dfl-uio-pdev module exposes Will change it. > > +interfaces. It adds the uio_pdrv_genirq platform device with the resources of > > +the DFL device, and let the generic UIO platform device driver provide UIO > the DLF device, and lets Will change it. > > +support to userspace. > Use FPGA_DFL_UIO_PDEV to enable this feature. I didn't get your idea for this. > > + > > +The DFL UIO driver has a special matching algorithem. It will match any DFL > > +device which could not be handled by other DFL drivers. In this way, it will > > +not impact the functionality of the features which are already supported by the > > +system. > (not sure if this section is needed) I think we may keep it. Thanks, Yilun
On 12/14/20 6:22 PM, Xu Yilun wrote: > On Mon, Dec 14, 2020 at 02:14:56PM -0800, Tom Rix wrote: >> On 12/13/20 7:36 PM, Xu Yilun wrote: >>> This patch adds description for UIO support for dfl devices on DFL >>> bus. >>> >>> Signed-off-by: Xu Yilun <yilun.xu@intel.com> >>> --- >>> v2: no doc in v1, add it for v2. >>> --- >> >>> +components. They could instantiate a new private feature in the DFL, and then >>> +get a DFL device in their system. In some cases users may need a userspace >>> +driver for the DFL device: >>> + >>> +* Users may need to run some diagnostic test for their hardwares. >> * Users may prototype the kernel driver in user space. > Could we just add the line rather than replacing the previous line? I think this > comment is describing a different usecase. Yes, this is what i ment, please use your original. I am offering another usecase, one I will use. Add mine as well, if you want. > >>> +* Some hardware is designed for specific purposes and does not fit into one of >>> + the standard kernel subsystems. >>> + >>> +This requires the direct access to the MMIO space and interrupt handling in >>> +userspace. We implemented a dfl-uio-pdev module which exposes the UIO device >> The dfl-uio-pdev module exposes > Will change it. > >>> +interfaces. It adds the uio_pdrv_genirq platform device with the resources of >>> +the DFL device, and let the generic UIO platform device driver provide UIO >> the DLF device, and lets > Will change it. > >>> +support to userspace. >> Use FPGA_DFL_UIO_PDEV to enable this feature. > I didn't get your idea for this. I wanted the user to know which kconfig controls this feature. Leave it out if you don't think it fits. > >>> + >>> +The DFL UIO driver has a special matching algorithem. It will match any DFL >>> +device which could not be handled by other DFL drivers. In this way, it will >>> +not impact the functionality of the features which are already supported by the >>> +system. >> (not sure if this section is needed) > I think we may keep it. Ok. Tom > > Thanks, > Yilun >
On Mon, Dec 14, 2020 at 08:43:31PM -0800, Tom Rix wrote: > > On 12/14/20 6:22 PM, Xu Yilun wrote: > > On Mon, Dec 14, 2020 at 02:14:56PM -0800, Tom Rix wrote: > >> On 12/13/20 7:36 PM, Xu Yilun wrote: > >>> This patch adds description for UIO support for dfl devices on DFL > >>> bus. > >>> > >>> Signed-off-by: Xu Yilun <yilun.xu@intel.com> > >>> --- > >>> v2: no doc in v1, add it for v2. > >>> --- > >> > >>> +components. They could instantiate a new private feature in the DFL, and then > >>> +get a DFL device in their system. In some cases users may need a userspace > >>> +driver for the DFL device: > >>> + > >>> +* Users may need to run some diagnostic test for their hardwares. > >> * Users may prototype the kernel driver in user space. > > Could we just add the line rather than replacing the previous line? I think this > > comment is describing a different usecase. > > Yes, this is what i ment, please use your original. > > I am offering another usecase, one I will use. > > Add mine as well, if you want. I'll add your usecase. > > > > >>> +* Some hardware is designed for specific purposes and does not fit into one of > >>> + the standard kernel subsystems. > >>> + > >>> +This requires the direct access to the MMIO space and interrupt handling in > >>> +userspace. We implemented a dfl-uio-pdev module which exposes the UIO device > >> The dfl-uio-pdev module exposes > > Will change it. > > > >>> +interfaces. It adds the uio_pdrv_genirq platform device with the resources of > >>> +the DFL device, and let the generic UIO platform device driver provide UIO > >> the DLF device, and lets > > Will change it. > > > >>> +support to userspace. > >> Use FPGA_DFL_UIO_PDEV to enable this feature. > > I didn't get your idea for this. > > I wanted the user to know which kconfig controls this feature. Understood. I'll add it. Thanks, Yilun
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index 0404fe6..a15e81e 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -502,6 +502,29 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) could be a reference. +UIO support for DFL devices +=========================== +The FPGA is open for users to be reprogramed with newly developed hardware +components. They could instantiate a new private feature in the DFL, and then +get a DFL device in their system. In some cases users may need a userspace +driver for the DFL device: + +* Users may need to run some diagnostic test for their hardwares. +* Some hardware is designed for specific purposes and does not fit into one of + the standard kernel subsystems. + +This requires the direct access to the MMIO space and interrupt handling in +userspace. We implemented a dfl-uio-pdev module which exposes the UIO device +interfaces. It adds the uio_pdrv_genirq platform device with the resources of +the DFL device, and let the generic UIO platform device driver provide UIO +support to userspace. + +The DFL UIO driver has a special matching algorithem. It will match any DFL +device which could not be handled by other DFL drivers. In this way, it will +not impact the functionality of the features which are already supported by the +system. + + Open discussion =============== FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration
This patch adds description for UIO support for dfl devices on DFL bus. Signed-off-by: Xu Yilun <yilun.xu@intel.com> --- v2: no doc in v1, add it for v2. --- Documentation/fpga/dfl.rst | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)