@@ -516,10 +516,10 @@ static int altera_cvp_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops altera_cvp_ops = {
- .state = altera_cvp_state,
- .write_init = altera_cvp_write_init,
- .write = altera_cvp_write,
- .write_complete = altera_cvp_write_complete,
+ .state = altera_cvp_state,
+ .reconfig.write_init = altera_cvp_write_init,
+ .reconfig.write = altera_cvp_write,
+ .reconfig.write_complete = altera_cvp_write_complete,
};
static const struct cvp_priv cvp_priv_v1 = {
@@ -167,10 +167,10 @@ static int alt_pr_fpga_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops alt_pr_ops = {
- .state = alt_pr_fpga_state,
- .write_init = alt_pr_fpga_write_init,
- .write = alt_pr_fpga_write,
- .write_complete = alt_pr_fpga_write_complete,
+ .state = alt_pr_fpga_state,
+ .reconfig.write_init = alt_pr_fpga_write_init,
+ .reconfig.write = alt_pr_fpga_write,
+ .reconfig.write_complete = alt_pr_fpga_write_complete,
};
int alt_pr_register(struct device *dev, void __iomem *reg_base)
@@ -231,10 +231,10 @@ static int altera_ps_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops altera_ps_ops = {
- .state = altera_ps_state,
- .write_init = altera_ps_write_init,
- .write = altera_ps_write,
- .write_complete = altera_ps_write_complete,
+ .state = altera_ps_state,
+ .reconfig.write_init = altera_ps_write_init,
+ .reconfig.write = altera_ps_write,
+ .reconfig.write_complete = altera_ps_write_complete,
};
static const struct altera_ps_data *id_to_data(const struct spi_device_id *id)
@@ -260,10 +260,10 @@ static u64 fme_mgr_status(struct fpga_manager *mgr)
}
static const struct fpga_manager_ops fme_mgr_ops = {
- .write_init = fme_mgr_write_init,
- .write = fme_mgr_write,
- .write_complete = fme_mgr_write_complete,
- .status = fme_mgr_status,
+ .status = fme_mgr_status,
+ .reconfig.write_init = fme_mgr_write_init,
+ .reconfig.write = fme_mgr_write,
+ .reconfig.write_complete = fme_mgr_write_complete,
};
static void fme_mgr_get_compat_id(void __iomem *fme_pr,
@@ -44,15 +44,15 @@ static inline int fpga_mgr_write_init(struct fpga_manager *mgr,
struct fpga_image_info *info,
const char *buf, size_t count)
{
- if (mgr->mops && mgr->mops->write_init)
- return mgr->mops->write_init(mgr, info, buf, count);
+ if (mgr->mops && mgr->mops->reconfig.write_init)
+ return mgr->mops->reconfig.write_init(mgr, info, buf, count);
return 0;
}
static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count)
{
- if (mgr->mops && mgr->mops->write)
- return mgr->mops->write(mgr, buf, count);
+ if (mgr->mops && mgr->mops->reconfig.write)
+ return mgr->mops->reconfig.write(mgr, buf, count);
return -EOPNOTSUPP;
}
@@ -66,8 +66,8 @@ static inline int fpga_mgr_write_complete(struct fpga_manager *mgr,
int ret = 0;
mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
- if (mgr->mops && mgr->mops->write_complete)
- ret = mgr->mops->write_complete(mgr, info);
+ if (mgr->mops && mgr->mops->reconfig.write_complete)
+ ret = mgr->mops->reconfig.write_complete(mgr, info);
if (ret) {
dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
@@ -225,8 +225,8 @@ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
/* Write the FPGA image to the FPGA. */
mgr->state = FPGA_MGR_STATE_WRITE;
- if (mgr->mops->write_sg) {
- ret = mgr->mops->write_sg(mgr, sgt);
+ if (mgr->mops->reconfig.write_sg) {
+ ret = mgr->mops->reconfig.write_sg(mgr, sgt);
} else {
struct sg_mapping_iter miter;
@@ -302,7 +302,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr,
* contiguous kernel buffer and the driver doesn't require SG, non-SG
* drivers will still work on the slow path.
*/
- if (mgr->mops->write)
+ if (mgr->mops->reconfig.write)
return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
/*
@@ -126,10 +126,10 @@ static int ice40_fpga_ops_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops ice40_fpga_ops = {
- .state = ice40_fpga_ops_state,
- .write_init = ice40_fpga_ops_write_init,
- .write = ice40_fpga_ops_write,
- .write_complete = ice40_fpga_ops_write_complete,
+ .state = ice40_fpga_ops_state,
+ .reconfig.write_init = ice40_fpga_ops_write_init,
+ .reconfig.write = ice40_fpga_ops_write,
+ .reconfig.write_complete = ice40_fpga_ops_write_complete,
};
static int ice40_fpga_probe(struct spi_device *spi)
@@ -350,10 +350,10 @@ static int machxo2_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops machxo2_ops = {
- .state = machxo2_spi_state,
- .write_init = machxo2_write_init,
- .write = machxo2_write,
- .write_complete = machxo2_write_complete,
+ .state = machxo2_spi_state,
+ .reconfig.write_init = machxo2_write_init,
+ .reconfig.write = machxo2_write,
+ .reconfig.write_complete = machxo2_write_complete,
};
static int machxo2_spi_probe(struct spi_device *spi)
@@ -458,11 +458,11 @@ static enum fpga_mgr_states socfpga_a10_fpga_state(struct fpga_manager *mgr)
}
static const struct fpga_manager_ops socfpga_a10_fpga_mgr_ops = {
- .initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4,
- .state = socfpga_a10_fpga_state,
- .write_init = socfpga_a10_fpga_write_init,
- .write = socfpga_a10_fpga_write,
- .write_complete = socfpga_a10_fpga_write_complete,
+ .initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4,
+ .state = socfpga_a10_fpga_state,
+ .reconfig.write_init = socfpga_a10_fpga_write_init,
+ .reconfig.write = socfpga_a10_fpga_write,
+ .reconfig.write_complete = socfpga_a10_fpga_write_complete,
};
static int socfpga_a10_fpga_probe(struct platform_device *pdev)
@@ -534,10 +534,10 @@ static enum fpga_mgr_states socfpga_fpga_ops_state(struct fpga_manager *mgr)
}
static const struct fpga_manager_ops socfpga_fpga_ops = {
- .state = socfpga_fpga_ops_state,
- .write_init = socfpga_fpga_ops_configure_init,
- .write = socfpga_fpga_ops_configure_write,
- .write_complete = socfpga_fpga_ops_configure_complete,
+ .state = socfpga_fpga_ops_state,
+ .reconfig.write_init = socfpga_fpga_ops_configure_init,
+ .reconfig.write = socfpga_fpga_ops_configure_write,
+ .reconfig.write_complete = socfpga_fpga_ops_configure_complete,
};
static int socfpga_fpga_probe(struct platform_device *pdev)
@@ -389,9 +389,9 @@ static int s10_ops_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops s10_ops = {
- .write_init = s10_ops_write_init,
- .write = s10_ops_write,
- .write_complete = s10_ops_write_complete,
+ .reconfig.write_init = s10_ops_write_init,
+ .reconfig.write = s10_ops_write,
+ .reconfig.write_complete = s10_ops_write_complete,
};
static int s10_probe(struct platform_device *pdev)
@@ -93,9 +93,9 @@ static int ts73xx_fpga_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops ts73xx_fpga_ops = {
- .write_init = ts73xx_fpga_write_init,
- .write = ts73xx_fpga_write,
- .write_complete = ts73xx_fpga_write_complete,
+ .reconfig.write_init = ts73xx_fpga_write_init,
+ .reconfig.write = ts73xx_fpga_write,
+ .reconfig.write_complete = ts73xx_fpga_write_complete,
};
static int ts73xx_fpga_probe(struct platform_device *pdev)
@@ -214,10 +214,10 @@ static int xilinx_spi_write_complete(struct fpga_manager *mgr,
}
static const struct fpga_manager_ops xilinx_spi_ops = {
- .state = xilinx_spi_state,
- .write_init = xilinx_spi_write_init,
- .write = xilinx_spi_write,
- .write_complete = xilinx_spi_write_complete,
+ .state = xilinx_spi_state,
+ .reconfig.write_init = xilinx_spi_write_init,
+ .reconfig.write = xilinx_spi_write,
+ .reconfig.write_complete = xilinx_spi_write_complete,
};
static int xilinx_spi_probe(struct spi_device *spi)
@@ -543,11 +543,11 @@ static enum fpga_mgr_states zynq_fpga_ops_state(struct fpga_manager *mgr)
}
static const struct fpga_manager_ops zynq_fpga_ops = {
- .initial_header_size = 128,
- .state = zynq_fpga_ops_state,
- .write_init = zynq_fpga_ops_write_init,
- .write_sg = zynq_fpga_ops_write,
- .write_complete = zynq_fpga_ops_write_complete,
+ .initial_header_size = 128,
+ .state = zynq_fpga_ops_state,
+ .reconfig.write_init = zynq_fpga_ops_write_init,
+ .reconfig.write_sg = zynq_fpga_ops_write,
+ .reconfig.write_complete = zynq_fpga_ops_write_complete,
};
static int zynq_fpga_probe(struct platform_device *pdev)
@@ -78,9 +78,9 @@ static enum fpga_mgr_states zynqmp_fpga_ops_state(struct fpga_manager *mgr)
}
static const struct fpga_manager_ops zynqmp_fpga_ops = {
- .state = zynqmp_fpga_ops_state,
- .write_init = zynqmp_fpga_ops_write_init,
- .write = zynqmp_fpga_ops_write,
+ .state = zynqmp_fpga_ops_state,
+ .reconfig.write_init = zynqmp_fpga_ops_write_init,
+ .reconfig.write = zynqmp_fpga_ops_write,
};
static int zynqmp_fpga_probe(struct platform_device *pdev)
@@ -106,14 +106,29 @@ struct fpga_image_info {
};
/**
- * struct fpga_manager_ops - ops for low level fpga manager drivers
- * @initial_header_size: Maximum number of bytes that should be passed into write_init
- * @state: returns an enum value of the FPGA's state
- * @status: returns status of the FPGA, including reconfiguration error code
+ * struct fpga_manager_update_ops - ops updating fpga
* @write_init: prepare the FPGA to receive configuration data
* @write: write count bytes of configuration data to the FPGA
* @write_sg: write the scatter list of configuration data to the FPGA
* @write_complete: set FPGA to operating state after writing is done
+ */
+struct fpga_manager_update_ops {
+ int (*write_init)(struct fpga_manager *mgr,
+ struct fpga_image_info *info,
+ const char *buf, size_t count);
+ int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
+ int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt);
+ int (*write_complete)(struct fpga_manager *mgr,
+ struct fpga_image_info *info);
+};
+
+/**
+ * struct fpga_manager_ops - ops for low level fpga manager drivers
+ * @initial_header_size: Maximum number of bytes that should be passed into write_init
+ * @state: returns an enum value of the FPGA's state
+ * @status: returns status of the FPGA, including reconfiguration error code
+ * @partial_update: ops for doing partial reconfiguration
+ * @full_update: ops for doing a full card update, user,shell,fw ie. the works
* @fpga_remove: optional: Set FPGA into a specific state during driver remove
* @groups: optional attribute groups.
*
@@ -125,13 +140,8 @@ struct fpga_manager_ops {
size_t initial_header_size;
enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
u64 (*status)(struct fpga_manager *mgr);
- int (*write_init)(struct fpga_manager *mgr,
- struct fpga_image_info *info,
- const char *buf, size_t count);
- int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
- int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt);
- int (*write_complete)(struct fpga_manager *mgr,
- struct fpga_image_info *info);
+ struct fpga_manager_update_ops reconfig;
+ struct fpga_manager_update_ops reimage;
void (*fpga_remove)(struct fpga_manager *mgr);
const struct attribute_group **groups;
};