diff mbox series

[v1,5/7] drivers: fpga: dfl: handle empty port list

Message ID 20220214112619.219761-6-tianfei.zhang@intel.com (mailing list archive)
State New
Headers show
Series Add Intel OFS support for DFL driver | expand

Commit Message

Zhang, Tianfei Feb. 14, 2022, 11:26 a.m. UTC
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

Not all FPGA designs managed by the DFL driver have a port.
In these cases, don't write the Port Access Control register
when enabling SRIOV.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
---
 drivers/fpga/dfl.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Tom Rix Feb. 15, 2022, 3:55 p.m. UTC | #1
On 2/14/22 3:26 AM, Tianfei zhang wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> Not all FPGA designs managed by the DFL driver have a port.
> In these cases, don't write the Port Access Control register
> when enabling SRIOV.

Drop the 'drivers:' in the subject line.

This patch likely needs to moved to 4/7 since the last patch also 
iterated over the list.

Tom

>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
> ---
>   drivers/fpga/dfl.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index cfc539a656f0..a5263ac258c5 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -1708,6 +1708,8 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
>   	int ret = 0, port_count = 0;
>   
>   	mutex_lock(&cdev->lock);
> +	if (list_empty(&cdev->port_dev_list))
> +		goto done;
>   
>   	list_for_each_entry(pdata, &cdev->port_dev_list, node) {
>   		if (pdata->dev)
Zhang, Tianfei Feb. 18, 2022, 8:24 a.m. UTC | #2
> -----Original Message-----
> From: Tom Rix <trix@redhat.com>
> Sent: Tuesday, February 15, 2022 11:56 PM
> To: Zhang, Tianfei <tianfei.zhang@intel.com>; Wu, Hao <hao.wu@intel.com>;
> mdf@kernel.org; Xu, Yilun <yilun.xu@intel.com>; linux-fpga@vger.kernel.org;
> linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: corbet@lwn.net; Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Subject: Re: [PATCH v1 5/7] drivers: fpga: dfl: handle empty port list
> 
> 
> On 2/14/22 3:26 AM, Tianfei zhang wrote:
> > From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> >
> > Not all FPGA designs managed by the DFL driver have a port.
> > In these cases, don't write the Port Access Control register when
> > enabling SRIOV.
> 
> Drop the 'drivers:' in the subject line.

Yes, I agree.

> 
> This patch likely needs to moved to 4/7 since the last patch also iterated over
> the list.

Yes,  I agree, I will move it on next version patch.

> 
> Tom
> 
> >
> > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> > Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
> > ---
> >   drivers/fpga/dfl.c | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index
> > cfc539a656f0..a5263ac258c5 100644
> > --- a/drivers/fpga/dfl.c
> > +++ b/drivers/fpga/dfl.c
> > @@ -1708,6 +1708,8 @@ int dfl_fpga_cdev_config_ports_vf(struct
> dfl_fpga_cdev *cdev, int num_vfs)
> >   	int ret = 0, port_count = 0;
> >
> >   	mutex_lock(&cdev->lock);
> > +	if (list_empty(&cdev->port_dev_list))
> > +		goto done;
> >
> >   	list_for_each_entry(pdata, &cdev->port_dev_list, node) {
> >   		if (pdata->dev)
diff mbox series

Patch

diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index cfc539a656f0..a5263ac258c5 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -1708,6 +1708,8 @@  int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
 	int ret = 0, port_count = 0;
 
 	mutex_lock(&cdev->lock);
+	if (list_empty(&cdev->port_dev_list))
+		goto done;
 
 	list_for_each_entry(pdata, &cdev->port_dev_list, node) {
 		if (pdata->dev)