From patchwork Tue Mar 24 18:00:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Marco-Gisbert X-Patchwork-Id: 6084901 Return-Path: X-Original-To: patchwork-linux-fsdevel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 582BFBF90F for ; Tue, 24 Mar 2015 18:11:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 523FE20225 for ; Tue, 24 Mar 2015 18:11:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C472E20172 for ; Tue, 24 Mar 2015 18:11:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752912AbbCXSLk (ORCPT ); Tue, 24 Mar 2015 14:11:40 -0400 Received: from smtpsal1.cc.upv.es ([158.42.249.61]:42973 "EHLO smtpsalv.upv.es" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752567AbbCXSLk (ORCPT ); Tue, 24 Mar 2015 14:11:40 -0400 X-Greylist: delayed 598 seconds by postgrey-1.27 at vger.kernel.org; Tue, 24 Mar 2015 14:11:39 EDT Received: from smtpx.upv.es (smtpxv.cc.upv.es [158.42.249.46]) by smtpsalv.upv.es (8.14.4/8.14.4) with ESMTP id t2OI1BPw023110 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 24 Mar 2015 19:01:12 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=upv.es; s=default; t=1427220074; bh=waME+GS2WwxEN7Hwl+gezT0HInSQuR7SlSlAIUBYyyE=; h=From:To:Cc:Subject:Date; b=CiUH+jy8rlYV3nP4sojQc1PH9cSBl3LDKHmQpguOtc3jfU1oYMnMMmyPci7wdWyWf 184T5ARdG5fYUSEelwzrzI8aNj27QsQhMM4BfAhsNfF1bv8z/5zQxZMtJZTs8TbrZy 9bBr9UQP7TO/oD+5F7wJa7jYxZ7zxeOWw6gab7vio5q4ag0DwWjr32oVYDohwSSQUI mhv5/ui8LrCV+KWKv7IVC4unxbzrwdlJJrR/SVgKKtk2TVsOGM1GXlgF8MI3KIapvH uD512OI0p7n2CK0xf6QizvcUMWxqwH/LmXqiKObye/vHNzDM7a7vrk2gbYFmqZZyzE cyzUwToNl0B7Q== Received: from smtp.upv.es (smtpv.cc.upv.es [158.42.249.16]) by smtpx.upv.es (8.14.3/8.14.3) with ESMTP id t2OI1BJR006967; Tue, 24 Mar 2015 19:01:11 +0100 Received: from localhost.localdomain (trinca.disca.upv.es [158.42.52.215]) (authenticated bits=0) by smtp.upv.es (8.14.4/8.14.4) with ESMTP id t2OI16af025002 (version=TLSv1/SSLv3 cipher=AES128-SHA256 bits=128 verify=NO); Tue, 24 Mar 2015 19:01:09 +0100 From: Hector Marco-Gisbert To: linux-kernel@vger.kernel.org Cc: akpm@linux-foundation.org, Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Alexander Viro , Jan-Simon , linux-fsdevel@vger.kernel.org, Hector Marco-Gisbert , Ismael Ripoll Subject: [PATCH] mm/x86: AMD Bulldozer ASLR fix Date: Tue, 24 Mar 2015 19:00:48 +0100 Message-Id: <1427220048-6618-1-git-send-email-hecmargi@upv.es> X-Mailer: git-send-email 1.9.1 Sender: linux-fsdevel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A bug in Linux ASLR implementation which affects some AMD processors has been found. The issue affects to all Linux process even if they are not using shared libraries (statically compiled). The problem appears because some mmapped objects (VDSO, libraries, etc.) are poorly randomized in an attempt to avoid cache aliasing penalties for AMD Bulldozer (Family 15h) processors. Affected systems have reduced the mmapped files entropy by eight. The following output is the run on an AMD Opteron 62xx class CPU processor under x86_64 Linux 4.0.0: for i in `seq 1 10`; do cat /proc/self/maps | grep "r-xp.*libc" ; done b7588000-b7736000 r-xp 00000000 00:01 4924 /lib/i386-linux-gnu/libc.so.6 b7570000-b771e000 r-xp 00000000 00:01 4924 /lib/i386-linux-gnu/libc.so.6 b75d0000-b777e000 r-xp 00000000 00:01 4924 /lib/i386-linux-gnu/libc.so.6 b75b0000-b775e000 r-xp 00000000 00:01 4924 /lib/i386-linux-gnu/libc.so.6 b7578000-b7726000 r-xp 00000000 00:01 4924 /lib/i386-linux-gnu/libc.so.6 As shown in the previous output, the bits 12, 13 and 14 are always 0. The address always ends in 0x8000 or 0x0000. The bug is caused by a hack to improve performance by avoiding cache aliasing penalties in the Family 15h of AMD Bulldozer processors (commit: dfb09f9b). 32-bit systems are specially sensitive to this issue because the entropy for libraries is reduced from 2^8 to 2^5, which means that libraries only have 32 different places where they can be loaded. This patch randomizes per boot the three affected bits, rather than setting them to zero. Since all the shared pages have the same value at the bits [12..14], there is no cache aliasing problems (which is supposed to be the cause of performance loss). On the other hand, since the value is not known by a potential remote attacker, the ASLR preserves its effectiveness. More details at: http://hmarco.org/bugs/AMD-Bulldozer-linux-ASLR-weakness-reducing-mmaped-files-by-eight.html Signed-off-by: Hector Marco-Gisbert Signed-off-by: Ismael Ripoll --- arch/x86/include/asm/amd_15h.h | 6 ++++++ arch/x86/kernel/cpu/amd.c | 5 +++++ arch/x86/kernel/sys_x86_64.c | 16 +++++++++++++--- 3 files changed, 24 insertions(+), 3 deletions(-) create mode 100644 arch/x86/include/asm/amd_15h.h diff --git a/arch/x86/include/asm/amd_15h.h b/arch/x86/include/asm/amd_15h.h new file mode 100644 index 0000000..3e6fb6e --- /dev/null +++ b/arch/x86/include/asm/amd_15h.h @@ -0,0 +1,6 @@ +#ifndef _ASM_X86_AMD_15H_H +#define _ASM_X86_AMD_15H_H + +extern unsigned long rnd_bulldozer_bits __read_mostly; + +#endif /* _ASM_X86_AMD_15H_H */ diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 15c5df9..a693d54 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -18,6 +19,8 @@ #include "cpu.h" +unsigned long rnd_bulldozer_bits = 0; + static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) { u32 gprs[8] = { 0 }; @@ -488,6 +491,8 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) va_align.mask = (upperbit - 1) & PAGE_MASK; va_align.flags = ALIGN_VA_32 | ALIGN_VA_64; + /* A random value per boot for bits 12,13 and 14 */ + rnd_bulldozer_bits = get_random_int() & va_align.mask; } } diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c index 30277e2..5b8ad01 100644 --- a/arch/x86/kernel/sys_x86_64.c +++ b/arch/x86/kernel/sys_x86_64.c @@ -18,6 +18,7 @@ #include #include +#include /* * Align a virtual address to avoid aliasing in the I$ on AMD F15h. @@ -34,10 +35,16 @@ static unsigned long get_align_mask(void) return va_align.mask; } +static unsigned long get_bulldozer_bits(void){ + + return rnd_bulldozer_bits & get_align_mask(); +} + unsigned long align_vdso_addr(unsigned long addr) { unsigned long align_mask = get_align_mask(); - return (addr + align_mask) & ~align_mask; + addr = (addr + align_mask) & ~align_mask; + return addr | get_bulldozer_bits(); } static int __init control_va_addr_alignment(char *str) @@ -137,7 +144,10 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, info.high_limit = end; info.align_mask = filp ? get_align_mask() : 0; info.align_offset = pgoff << PAGE_SHIFT; - return vm_unmapped_area(&info); + addr = vm_unmapped_area(&info); + if (!(addr & ~PAGE_MASK)) + return filp ? (addr|get_bulldozer_bits()) : addr; + return addr; } unsigned long @@ -178,7 +188,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, info.align_offset = pgoff << PAGE_SHIFT; addr = vm_unmapped_area(&info); if (!(addr & ~PAGE_MASK)) - return addr; + return filp ? (addr|get_bulldozer_bits()) : addr; VM_BUG_ON(addr != -ENOMEM); bottomup: