From patchwork Mon Nov 28 21:50:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Wilcox X-Patchwork-Id: 9450331 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BBEE66074E for ; Mon, 28 Nov 2016 20:10:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF56126D05 for ; Mon, 28 Nov 2016 20:10:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A446A28068; Mon, 28 Nov 2016 20:10:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7EE9526D05 for ; Mon, 28 Nov 2016 20:10:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932447AbcK1UHP (ORCPT ); Mon, 28 Nov 2016 15:07:15 -0500 Received: from p3plsmtps2ded02.prod.phx3.secureserver.net ([208.109.80.59]:52494 "EHLO p3plsmtps2ded02.prod.phx3.secureserver.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754936AbcK1T4o (ORCPT ); Mon, 28 Nov 2016 14:56:44 -0500 Received: from linuxonhyperv.com ([72.167.245.219]) by : HOSTING RELAY : with SMTP id BS1ZcglcojKbYBS1Zcon1B; Mon, 28 Nov 2016 12:55:37 -0700 x-originating-ip: 72.167.245.219 Received: by linuxonhyperv.com (Postfix, from userid 528) id 1EDF622B8048; Mon, 28 Nov 2016 13:51:19 -0800 (PST) From: Matthew Wilcox To: linux-kernel@vger.kernel.org, Andrew Morton , Konstantin Khlebnikov , Ross Zwisler Cc: Matthew Wilcox , linux-mm@kvack.org, linux-fsdevel@vger.kernel.org, "Kirill A . Shutemov" Subject: [PATCH v3 31/33] idr: Reduce the number of bits per level from 8 to 6 Date: Mon, 28 Nov 2016 13:50:35 -0800 Message-Id: <1480369871-5271-32-git-send-email-mawilcox@linuxonhyperv.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1480369871-5271-1-git-send-email-mawilcox@linuxonhyperv.com> References: <1480369871-5271-1-git-send-email-mawilcox@linuxonhyperv.com> X-CMAE-Envelope: MS4wfEPIPgdpaMk+7QtiVYs958MhPLzdk5g5DBPz5ldnhDJLByU08okGG1+6880unHSUoeP2iocuDGM+V9od1Jlkr+SdUuaGwd6G4fPpmSTLYNo9cXmLR5rM UQSXRcojYWpDfJ7YmgwSKEw0xEuCo5mx/Qylmj2MeOlmCicaucerDOWuGZSwz4L5K5zzJ1lIwPVuGBddnTutgBR/lPbto7I6IlWtkqMx4hzKXyFaSBU+croC GPF14/IIZw1TMx2m7wycPnTc7em4V08PrdOD77T0reB8LDfQ/IyfKPMO/lFBIdh8+H40YSeLrA96wfrrA6ku5Bd6WRn6nCglqmhKIqNWVSn9nZs7A28eL5bg VnZxaKQZ459ZXar2YkgID4az9M/CeggncTDywwsMvIXh7s0Dj59srw7LEUJNcggg7woUCLYub6tCjGpzTfD4j4tWV+e88OfowiFdfU8tdUKbR7pz1qo= Sender: linux-fsdevel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Matthew Wilcox In preparation for merging the IDR and radix tree, reduce the fanout at each level from 256 to 64. If this causes a performance problem then a bisect will point to this commit, and we'll have a better idea about what we might do to fix it. Signed-off-by: Matthew Wilcox --- include/linux/idr.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/linux/idr.h b/include/linux/idr.h index 1eb755f..3c01b89 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -18,12 +18,11 @@ #include /* - * We want shallower trees and thus more bits covered at each layer. 8 - * bits gives us large enough first layer for most use cases and maximum - * tree depth of 4. Each idr_layer is slightly larger than 2k on 64bit and - * 1k on 32bit. + * Using 6 bits at each layer allows us to allocate 7 layers out of each page. + * 8 bits only gave us 3 layers out of every pair of pages, which is less + * efficient except for trees with a largest element between 192-255 inclusive. */ -#define IDR_BITS 8 +#define IDR_BITS 6 #define IDR_SIZE (1 << IDR_BITS) #define IDR_MASK ((1 << IDR_BITS)-1)