diff mbox series

[v5,09/12] arm64: traps: Shuffle code to eliminate forward declarations

Message ID 20200122212144.6409-10-broonie@kernel.org (mailing list archive)
State New, archived
Headers show
Series arm64: ARMv8.5-A: Branch Target Identification support | expand

Commit Message

Mark Brown Jan. 22, 2020, 9:21 p.m. UTC 
From: Dave Martin <Dave.Martin@arm.com>

Hoist the IT state handling code earlier in traps.c, to avoid
accumulating forward declarations.

No functional change.

Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/kernel/traps.c | 101 ++++++++++++++++++--------------------
 1 file changed, 49 insertions(+), 52 deletions(-)

Comments

kernel test robot Jan. 24, 2020, 11 p.m. UTC | #1 
Hi Mark,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on asm-generic/master]
[also build test ERROR on kvmarm/next linus/master v5.5-rc7]
[cannot apply to arm64/for-next/core arm-perf/for-next/perf next-20200124]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Mark-Brown/arm64-ARMv8-5-A-Branch-Target-Identification-support/20200124-203746
base:   https://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic.git master
config: arm64-randconfig-a001-20200124 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 7.5.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.5.0 make.cross ARCH=arm64 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   arch/arm64/kernel/traps.c: In function 'do_sysinstr':
>> arch/arm64/kernel/traps.c:728:14: error: 'sys64_hooks' undeclared (first use in this function); did you mean 'sys64_hook'?
     for (hook = sys64_hooks; hook->handler; hook++)
                 ^~~~~~~~~~~
                 sys64_hook
   arch/arm64/kernel/traps.c:728:14: note: each undeclared identifier is reported only once for each function it appears in
>> arch/arm64/kernel/traps.c:728:31: error: dereferencing pointer to incomplete type 'const struct sys64_hook'
     for (hook = sys64_hooks; hook->handler; hook++)
                                  ^~
>> arch/arm64/kernel/traps.c:728:46: error: increment of pointer to an incomplete type 'const struct sys64_hook'
     for (hook = sys64_hooks; hook->handler; hook++)
                                                 ^~

vim +728 arch/arm64/kernel/traps.c

70c63cdfd6ee61 Marc Zyngier     2018-09-27  723  
afa7c0e5b965cd James Morse      2019-10-25  724  void do_sysinstr(unsigned int esr, struct pt_regs *regs)
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  725  {
37143dcc44f8f3 Mark Rutland     2019-08-13  726  	const struct sys64_hook *hook;
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  727  
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09 @728  	for (hook = sys64_hooks; hook->handler; hook++)
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  729  		if ((hook->esr_mask & esr) == hook->esr_val) {
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  730  			hook->handler(esr, regs);
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  731  			return;
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  732  		}
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  733  
49f6cba617fef4 Mark Rutland     2017-01-27  734  	/*
49f6cba617fef4 Mark Rutland     2017-01-27  735  	 * New SYS instructions may previously have been undefined at EL0. Fall
49f6cba617fef4 Mark Rutland     2017-01-27  736  	 * back to our usual undefined instruction handler so that we handle
49f6cba617fef4 Mark Rutland     2017-01-27  737  	 * these consistently.
49f6cba617fef4 Mark Rutland     2017-01-27  738  	 */
49f6cba617fef4 Mark Rutland     2017-01-27  739  	do_undefinstr(regs);
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  740  }
b6e43c0e3129ff James Morse      2019-10-25  741  NOKPROBE_SYMBOL(do_sysinstr);
9dbd5bb25c56e3 Suzuki K Poulose 2016-09-09  742  

:::::: The code at line 728 was first introduced by commit
:::::: 9dbd5bb25c56e35e6b4c34d968689a1ded850924 arm64: Refactor sysinstr exception handling

:::::: TO: Suzuki K Poulose <suzuki.poulose@arm.com>
:::::: CC: Will Deacon <will.deacon@arm.com>

---
0-DAY kernel test infrastructure                 Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
diff mbox series

Patch

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index d42f0693623a..4fa8b92b8624 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -269,7 +269,55 @@  void arm64_notify_die(const char *str, struct pt_regs *regs,
 	}
 }
 
-static void advance_itstate(struct pt_regs *regs);
+#ifdef CONFIG_COMPAT
+#define PSTATE_IT_1_0_SHIFT	25
+#define PSTATE_IT_1_0_MASK	(0x3 << PSTATE_IT_1_0_SHIFT)
+#define PSTATE_IT_7_2_SHIFT	10
+#define PSTATE_IT_7_2_MASK	(0x3f << PSTATE_IT_7_2_SHIFT)
+
+static u32 compat_get_it_state(struct pt_regs *regs)
+{
+	u32 it, pstate = regs->pstate;
+
+	it  = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT;
+	it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2;
+
+	return it;
+}
+
+static void compat_set_it_state(struct pt_regs *regs, u32 it)
+{
+	u32 pstate_it;
+
+	pstate_it  = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK;
+	pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK;
+
+	regs->pstate &= ~PSR_AA32_IT_MASK;
+	regs->pstate |= pstate_it;
+}
+
+static void advance_itstate(struct pt_regs *regs)
+{
+	u32 it;
+
+	/* ARM mode */
+	if (!(regs->pstate & PSR_AA32_T_BIT) ||
+	    !(regs->pstate & PSR_AA32_IT_MASK))
+		return;
+
+	it  = compat_get_it_state(regs);
+
+	/*
+	 * If this is the last instruction of the block, wipe the IT
+	 * state. Otherwise advance it.
+	 */
+	if (!(it & 7))
+		it = 0;
+	else
+		it = (it & 0xe0) | ((it << 1) & 0x1f);
+
+	compat_set_it_state(regs, it);
+}
 
 void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
 {
@@ -575,34 +623,6 @@  static const struct sys64_hook sys64_hooks[] = {
 	{},
 };
 
-
-#ifdef CONFIG_COMPAT
-#define PSTATE_IT_1_0_SHIFT	25
-#define PSTATE_IT_1_0_MASK	(0x3 << PSTATE_IT_1_0_SHIFT)
-#define PSTATE_IT_7_2_SHIFT	10
-#define PSTATE_IT_7_2_MASK	(0x3f << PSTATE_IT_7_2_SHIFT)
-
-static u32 compat_get_it_state(struct pt_regs *regs)
-{
-	u32 it, pstate = regs->pstate;
-
-	it  = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT;
-	it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2;
-
-	return it;
-}
-
-static void compat_set_it_state(struct pt_regs *regs, u32 it)
-{
-	u32 pstate_it;
-
-	pstate_it  = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK;
-	pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK;
-
-	regs->pstate &= ~PSR_AA32_IT_MASK;
-	regs->pstate |= pstate_it;
-}
-
 static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs)
 {
 	int cond;
@@ -623,29 +643,6 @@  static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs)
 	return aarch32_opcode_cond_checks[cond](regs->pstate);
 }
 
-static void advance_itstate(struct pt_regs *regs)
-{
-	u32 it;
-
-	/* ARM mode */
-	if (!(regs->pstate & PSR_AA32_T_BIT) ||
-	    !(regs->pstate & PSR_AA32_IT_MASK))
-		return;
-
-	it  = compat_get_it_state(regs);
-
-	/*
-	 * If this is the last instruction of the block, wipe the IT
-	 * state. Otherwise advance it.
-	 */
-	if (!(it & 7))
-		it = 0;
-	else
-		it = (it & 0xe0) | ((it << 1) & 0x1f);
-
-	compat_set_it_state(regs, it);
-}
-
 static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
 {
 	int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT;