Message ID | 20230927140123.5283-5-joey.gouly@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 27 Sep 2023 14:01:35 +0000 From: Joey Gouly <joey.gouly@arm.com> To: <linux-arm-kernel@lists.infradead.org> CC: <nd@arm.com>, <akpm@linux-foundation.org>, <aneesh.kumar@linux.ibm.com>, <catalin.marinas@arm.com>, <dave.hansen@linux.intel.com>, <joey.gouly@arm.com>, <maz@kernel.org>, <oliver.upton@linux.dev>, <shuah@kernel.org>, <will@kernel.org>, <kvmarm@lists.linux.dev>, <linux-fsdevel@vger.kernel.org>, <linux-mm@kvack.org>, <linux-kselftest@vger.kernel.org> Subject: [PATCH v1 04/20] arm64: disable trapping of POR_EL0 to EL2 Date: Wed, 27 Sep 2023 15:01:07 +0100 Message-ID: <20230927140123.5283-5-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230927140123.5283-1-joey.gouly@arm.com> References: <20230927140123.5283-1-joey.gouly@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT048:EE_|DB4PR08MB8053:EE_|AM7EUR03FT037:EE_|AM9PR08MB6673:EE_ X-MS-Office365-Filtering-Correlation-Id: b7bd9057-4442-49b4-6928-08dbbf62810c x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index b7afaa026842..df5614be4b70 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -184,12 +184,20 @@ .Lset_pie_fgt_\@: mrs_s x1, SYS_ID_AA64MMFR3_EL1 ubfx x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4 - cbz x1, .Lset_fgt_\@ + cbz x1, .Lset_poe_fgt_\@ /* Disable trapping of PIR_EL1 / PIRE0_EL1 */ orr x0, x0, #HFGxTR_EL2_nPIR_EL1 orr x0, x0, #HFGxTR_EL2_nPIRE0_EL1 +.Lset_poe_fgt_\@: + mrs_s x1, SYS_ID_AA64MMFR3_EL1 + ubfx x1, x1, #ID_AA64MMFR3_EL1_S1POE_SHIFT, #4 + cbz x1, .Lset_fgt_\@ + + /* Disable trapping of POR_EL0 */ + orr x0, x0, #HFGxTR_EL2_nPOR_EL0 + .Lset_fgt_\@: msr_s SYS_HFGRTR_EL2, x0 msr_s SYS_HFGWTR_EL2, x0
Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> --- arch/arm64/include/asm/el2_setup.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)