From patchwork Tue Oct 29 23:44:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13855704 Received: from mail-pg1-f172.google.com (mail-pg1-f172.google.com [209.85.215.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D37D6213EE7 for ; Tue, 29 Oct 2024 23:45:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730245514; cv=none; b=jFvKMF4F5MTZ0DF+XkfgUWudsqNvTg4klLdM8RN2M1uCaZUKLF/5tRGNn7mS9RIzanpc3djGYigvEQR0rZ8GMPRnhWpHASq7x3pQokhgbTSbYey3Nx8QHyZzzUyfJCdaHzTAg1YiyH+qAsvglXLzuUPOJm4dDhHbUfcg+AJlan0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730245514; c=relaxed/simple; bh=80tkRbRnntF1PJ7L7KFsvILrtEPO/5deZeag8O0ibq8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uS61LkLpBBS7d4WsrSVZHAL3usWNr6c95wVc07ogPDb/xcNjI9uhylzIjAdQfjsWBfJ1JbWaQestxao99JKVG9l51CLJ+e7ziURPx6BaBi65gtppN+2eEivhuCumlw5rUQrBltPhmyaYRb9JetHb2aeVKpdBFK18cC4m0gIEsxw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=QyhpJAvS; arc=none smtp.client-ip=209.85.215.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="QyhpJAvS" Received: by mail-pg1-f172.google.com with SMTP id 41be03b00d2f7-7ea76a12c32so4653694a12.1 for ; Tue, 29 Oct 2024 16:45:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1730245511; x=1730850311; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=yi9c4PfgxIrsXFqGtUWAjsswGeaf0ww2Eq0Goi40tzg=; b=QyhpJAvSMCpEVgJKCBtgziJ0B4e67vJqIBIGD/NlPXK0i3GDlp/ASaWiE/y63TjfWz lzTQ355j3lZCWia4cUJVRwQ71ZyL1EKX44cR9M9IEvxJQ3TB42i27ukeVZd5TL08AOF1 nqN47JaWkEaybMyBSqxvCiycmif4/ano1sg5fI1n2GthFwNnlQ1lSFCIulDavyBgJUXV dGFkY5iY+B/gU+E9BoHlJ40Yw0/fagS0z63T/RCsp5tGcCg3cx0BQZPCm0ErdrMdUqe2 lxQA44gD4n0YTtMB5BhNUB0a1jwU4RvKGsFLHQmuPTNKeo1cuznYMYx+9gnrKgFNuaM3 U2uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730245511; x=1730850311; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yi9c4PfgxIrsXFqGtUWAjsswGeaf0ww2Eq0Goi40tzg=; b=VfiZ5GVm+5Tz1MF6so/Iou2BkPtmlzUHXl/DgbM+QLVuPDWyTGtB5qXiFlO4UC7z+m gnxLVuVmUWD1lX1qdXQ2yX77tzPLmtaqJYGZI0AosOazHyRiC6XUtU6IsSss+tGUKuNq XssMdYPJVR1IwOuRWGoW2pgSH5aDZ7iYjH8D0vaccP+6oFZddGQTRCgug+a4DwzNfEA/ x4wGmP3UWvEz8PnOmoQn3LagHz0MVVRRvx4XL0gcZiNRCSajDaaTp/uGYIKNGSeXMMkX yabp0wzBVacxWLRzbGAf0UBgt8T01g2/SJVdarwi6HCjFnsVYWbZz5oi8DLRPnnH2pU7 yMAQ== X-Forwarded-Encrypted: i=1; AJvYcCVxVOpvc++UZDNV5Psie/0/kroni3cwQtqGJoTQDE4s/ySnFWzMRprN2S27g/06R56A5gUWWSVyKRhTa/ST@vger.kernel.org X-Gm-Message-State: AOJu0Yz4NCrg/e/QBQkz/pRa0OjJ0ak97mcRvpC2H1NynhxbIJe7oeUc ouLFxWi88eFLu7XEfKg3s/KRW7OW/m1RpDIQjezMAt6K2/v5FZkLAhkDtc1R1lw= X-Google-Smtp-Source: AGHT+IF51lB1bvJMVNfZsGgqLWarH+JYdED//undtRt22viNiy18bh6cEWI+2sRnPRU3+1w1VPg/Hg== X-Received: by 2002:a05:6a21:3384:b0:1d9:c569:15f2 with SMTP id adf61e73a8af0-1d9c56916aamr12728492637.2.1730245510969; Tue, 29 Oct 2024 16:45:10 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72057921863sm8157643b3a.33.2024.10.29.16.45.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 16:45:10 -0700 (PDT) From: Deepak Gupta Date: Tue, 29 Oct 2024 16:44:21 -0700 Subject: [PATCH v7 21/32] riscv: signal: abstract header saving for setup_sigcontext Precedence: bulk X-Mailing-List: linux-fsdevel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241029-v5_user_cfi_series-v7-21-2727ce9936cb@rivosinc.com> References: <20241029-v5_user_cfi_series-v7-0-2727ce9936cb@rivosinc.com> In-Reply-To: <20241029-v5_user_cfi_series-v7-0-2727ce9936cb@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Andy Chiu X-Mailer: b4 0.14.0 From: Andy Chiu The function save_v_state() served two purposes. First, it saved extension context into the signal stack. Then, it constructed the extension header if there was no fault. The second part is independent of the extension itself. As a result, we can pull that part out, so future extensions may reuse it. This patch adds arch_ext_list and makes setup_sigcontext() go through all possible extensions' save() callback. The callback returns a positive value indicating the size of the successfully saved extension. Then the kernel proceeds to construct the header for that extension. The kernel skips an extension if it does not exist, or if the saving fails for some reasons. The error code is propagated out on the later case. This patch does not introduce any functional changes. Signed-off-by: Andy Chiu --- arch/riscv/include/asm/vector.h | 3 +++ arch/riscv/kernel/signal.c | 60 ++++++++++++++++++++++++++--------------- 2 files changed, 42 insertions(+), 21 deletions(-) diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h index be7d309cca8a..2d2ec6ca3abb 100644 --- a/arch/riscv/include/asm/vector.h +++ b/arch/riscv/include/asm/vector.h @@ -281,6 +281,9 @@ static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; } #define riscv_v_thread_free(tsk) do {} while (0) #define riscv_v_setup_ctx_cache() do {} while (0) #define riscv_v_thread_alloc(tsk) do {} while (0) +#define get_cpu_vector_context() do {} while (0) +#define put_cpu_vector_context() do {} while (0) +#define riscv_v_vstate_set_restore(task, regs) do {} while (0) #endif /* CONFIG_RISCV_ISA_V */ diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index dcd282419456..014ac1024b85 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -68,18 +68,18 @@ static long save_fp_state(struct pt_regs *regs, #define restore_fp_state(task, regs) (0) #endif -#ifdef CONFIG_RISCV_ISA_V - -static long save_v_state(struct pt_regs *regs, void __user **sc_vec) +static long save_v_state(struct pt_regs *regs, void __user *sc_vec) { - struct __riscv_ctx_hdr __user *hdr; struct __sc_riscv_v_state __user *state; void __user *datap; long err; - hdr = *sc_vec; - /* Place state to the user's signal context space after the hdr */ - state = (struct __sc_riscv_v_state __user *)(hdr + 1); + if (!IS_ENABLED(CONFIG_RISCV_ISA_V) || + !(has_vector() && riscv_v_vstate_query(regs))) + return 0; + + /* Place state to the user's signal context spac */ + state = (struct __sc_riscv_v_state __user *)sc_vec; /* Point datap right after the end of __sc_riscv_v_state */ datap = state + 1; @@ -97,15 +97,11 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec) err |= __put_user((__force void *)datap, &state->v_state.datap); /* Copy the whole vector content to user space datap. */ err |= __copy_to_user(datap, current->thread.vstate.datap, riscv_v_vsize); - /* Copy magic to the user space after saving all vector conetext */ - err |= __put_user(RISCV_V_MAGIC, &hdr->magic); - err |= __put_user(riscv_v_sc_size, &hdr->size); if (unlikely(err)) - return err; + return -EFAULT; - /* Only progress the sv_vec if everything has done successfully */ - *sc_vec += riscv_v_sc_size; - return 0; + /* Only return the size if everything has done successfully */ + return riscv_v_sc_size; } /* @@ -142,10 +138,19 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) */ return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } -#else -#define save_v_state(task, regs) (0) -#define __restore_v_state(task, regs) (0) -#endif + +struct arch_ext_priv { + __u32 magic; + long (*save)(struct pt_regs *regs, void __user *sc_vec); +}; + +struct arch_ext_priv arch_ext_list[] = { + { + .magic = RISCV_V_MAGIC, + .save = &save_v_state, + }, +}; +const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); static long restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) @@ -276,7 +281,8 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, { struct sigcontext __user *sc = &frame->uc.uc_mcontext; struct __riscv_ctx_hdr __user *sc_ext_ptr = &sc->sc_extdesc.hdr; - long err; + struct arch_ext_priv *arch_ext; + long err, i, ext_size; /* sc_regs is structured the same as the start of pt_regs */ err = __copy_to_user(&sc->sc_regs, regs, sizeof(sc->sc_regs)); @@ -284,8 +290,20 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, if (has_fpu()) err |= save_fp_state(regs, &sc->sc_fpregs); /* Save the vector state. */ - if (has_vector() && riscv_v_vstate_query(regs)) - err |= save_v_state(regs, (void __user **)&sc_ext_ptr); + for (i = 0; i < nr_arch_exts; i++) { + arch_ext = &arch_ext_list[i]; + if (!arch_ext->save) + continue; + + ext_size = arch_ext->save(regs, sc_ext_ptr + 1); + if (ext_size <= 0) { + err |= ext_size; + } else { + err |= __put_user(arch_ext->magic, &sc_ext_ptr->magic); + err |= __put_user(ext_size, &sc_ext_ptr->size); + sc_ext_ptr = (void *)sc_ext_ptr + ext_size; + } + } /* Write zero to fp-reserved space and check it on restore_sigcontext */ err |= __put_user(0, &sc->sc_extdesc.reserved); /* And put END __riscv_ctx_hdr at the end. */