From patchwork Thu Dec 5 00:09:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 11273775 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C36D9930 for ; Thu, 5 Dec 2019 00:10:25 +0000 (UTC) Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.kernel.org (Postfix) with SMTP id 9A34221823 for ; Thu, 5 Dec 2019 00:10:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="QxOqKsya" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9A34221823 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kernel-hardening-return-17455-patchwork-kernel-hardening=patchwork.kernel.org@lists.openwall.com Received: (qmail 26423 invoked by uid 550); 5 Dec 2019 00:10:22 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 26395 invoked from network); 5 Dec 2019 00:10:21 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=UytXlJZhh+PP1i+glyLgAUD5cLw4G7yz6Wut2v8BXhA=; b=QxOqKsyapbqk+/pSPb0Gw2Zm18hm9broo8Lb2eTyKrlGq1tWPs1ASqa2OqeLoIwsEx BoANHo1kmP9OCpEq2InAs+RHshYy90hD0yubM1yudLe6UDy+JcaESXTdlzUroge7wYxC XzqyYr7HB31mp90bODmkfoR4cJF73mTUtle3Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=UytXlJZhh+PP1i+glyLgAUD5cLw4G7yz6Wut2v8BXhA=; b=Z1SlS5ziLT/KWZWQ6LHdhmQ26husX4gmNpuYV+AEdzDbZafvbqA3SeAfXfuCP9Gm3l WKe6LYrbVRqSGz3XBNy0Zvs6voocw1WlDRQZwAcRbFPvKVtG5NXcHkKNmURVRiaIUdU7 JnFrBfyDkMxj5nnOnN7gL8A9fxD9iuUacotCKliTqvX5ApRptSDB4R5jiQdv3PDx54G+ PhClPv8pbv7zKfNbRiSvKiidcyaQ65CAhk+LfyBBFiNj3m32ADBzRYmX6l3AfQ+Fnacg QTt+m9PUxhTKYSsfJrv+XmEMrGqF8ufzDYdu93i51ud8US7Ung0qEx9feIiZUGdb+RRU CzRg== X-Gm-Message-State: APjAAAUqRClEqUQO765TDQt1GevK/4K3zdJnnWG9GyQm0LzgkO6hpsIW tY72I9aYedvQtJRTgSqVReej6WK5l5c= X-Google-Smtp-Source: APXvYqx2egJZownjeOB7aUkypSGIaPs5//EOll6rmXEBNtoJ5uqK7nOQ4gDytmta4ltf50AKitqeKA== X-Received: by 2002:a17:90a:9f04:: with SMTP id n4mr6211836pjp.76.1575504608976; Wed, 04 Dec 2019 16:10:08 -0800 (PST) From: Thomas Garnier To: kernel-hardening@lists.openwall.com Cc: kristen@linux.intel.com, keescook@chromium.org, Herbert Xu , "David S. Miller" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, Andy Lutomirski , Juergen Gross , Thomas Hellstrom , "VMware, Inc." , "Rafael J. Wysocki" , Len Brown , Pavel Machek , Rasmus Villemoes , Thomas Garnier , Peter Zijlstra , Will Deacon , Masami Hiramatsu , Jiri Slaby , Boris Ostrovsky , Greg Kroah-Hartman , Alexios Zavras , Allison Randal , linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, virtualization@lists.linux-foundation.org, linux-pm@vger.kernel.org Subject: [PATCH v10 00/11] x86: PIE support to extend KASLR randomization Date: Wed, 4 Dec 2019 16:09:37 -0800 Message-Id: <20191205000957.112719-1-thgarnie@chromium.org> X-Mailer: git-send-email 2.24.0.393.g34dc348eaf-goog MIME-Version: 1.0 Minor changes based on feedback and rebase from v9. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v10 (assembly): - Swap rax for rdx on entry/64 changes based on feedback. - Addressed feedback from Borislav Petkov on boot, paravirt, alternatives and globally. - Rebased the patchset and ensure it works with large kaslr (not included). - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. - fix typo on comment end line. - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chromium email address. - patch v7 (assembly): - Split patchset and reorder changes. - patch v6: - Rebase on latest changes in jump tables and crypto. - Fix wording on couple commits. - Revisit checkpatch warnings. - Moving to @chromium.org. - patch v5: - Adapt new crypto modules for PIE. - Improve per-cpu commit message. - Fix xen 32-bit build error with .quad. - Remove extra code for ftrace. - patch v4: - Simplify early boot by removing global variables. - Modify the mcount location script for __mcount_loc intead of the address read in the ftrace implementation. - Edit commit description to explain better where the kernel can be located. - Streamlined the testing done on each patch proposal. Always testing hibernation, suspend, ftrace and kprobe to ensure no regressions. - patch v3: - Update on message to describe longer term PIE goal. - Minor change on ftrace if condition. - Changed code using xchgq. - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce dynamic relocation space on mapped memory. It also simplifies the relocation process. - Move the start the module section next to the kernel. Remove the need for -mcmodel=large on modules. Extends module space from 1 to 2G maximum. - Support for XEN PVH as 32-bit relocations can be ignored with --emit-relocs. - Support for GOT relocations previously done automatically with -pie. - Remove need for dynamic PLT in modules. - Support dymamic GOT for modules. - rfc v2: - Add support for global stack cookie while compiler default to fs without mcmodel=kernel - Change patch 7 to correctly jump out of the identity mapping on kexec load preserve. These patches make some of the changes necessary to build the kernel as Position Independent Executable (PIE) on x86_64. Another patchset will add the PIE option and larger architecture changes. PIE allows the kernel to be placed below the 0xffffffff80000000 increasing the range of KASLR. The patches: - 1, 3-11: Change in assembly code to be PIE compliant. - 2: Add a new _ASM_MOVABS macro to fetch a symbol address generically. diffstat: crypto/aegis128-aesni-asm.S | 6 +- crypto/aesni-intel_asm.S | 8 +-- crypto/aesni-intel_avx-x86_64.S | 3 - crypto/camellia-aesni-avx-asm_64.S | 42 +++++++-------- crypto/camellia-aesni-avx2-asm_64.S | 44 ++++++++-------- crypto/camellia-x86_64-asm_64.S | 8 +-- crypto/cast5-avx-x86_64-asm_64.S | 50 ++++++++++-------- crypto/cast6-avx-x86_64-asm_64.S | 44 +++++++++------- crypto/des3_ede-asm_64.S | 96 ++++++++++++++++++++++++------------ crypto/ghash-clmulni-intel_asm.S | 4 - crypto/glue_helper-asm-avx.S | 4 - crypto/glue_helper-asm-avx2.S | 6 +- crypto/sha256-avx2-asm.S | 18 ++++-- entry/entry_64.S | 16 ++++-- include/asm/alternative.h | 6 +- include/asm/asm.h | 1 include/asm/paravirt_types.h | 32 ++++++++++-- include/asm/pm-trace.h | 2 include/asm/processor.h | 6 +- kernel/acpi/wakeup_64.S | 31 ++++++----- kernel/head_64.S | 15 +++-- kernel/relocate_kernel_64.S | 2 power/hibernate_asm_64.S | 4 - 23 files changed, 267 insertions(+), 181 deletions(-) Patchset is based on next-20191203.