From patchwork Fri Feb 10 17:16:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9567149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9AADB601EA for ; Fri, 10 Feb 2017 17:17:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A1B227B81 for ; Fri, 10 Feb 2017 17:17:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7E84627F9E; Fri, 10 Feb 2017 17:17:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 9C78427B81 for ; Fri, 10 Feb 2017 17:17:15 +0000 (UTC) Received: (qmail 7347 invoked by uid 550); 10 Feb 2017 17:17:10 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 6134 invoked from network); 10 Feb 2017 17:17:07 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rP3HLwFK1xVKGJ5mj4o6UuXvqXTspCl/q3LrGzH8R+k=; b=fyfiuvGL2Qmt6pccuOs6MdZLzvlGGBdwu4cKVTDq7RHcIZDfd5b6+WBDSdgkvOiK0R BrRwGpJoo0TvJD+9BJK3ICJ5yYO9dWY+4lR/qsnScS1oO8hlMfj5UM5ZqVh/37b3RLFh xB85kSJnZ+P87rmdtS53qPlK6yX9ymFoGyumA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rP3HLwFK1xVKGJ5mj4o6UuXvqXTspCl/q3LrGzH8R+k=; b=UlfopB3jzq0S5DyYuC2HFCmLvMEW5zkg6TnVtv6W+MU+WSuMGYrkgHmqHUcWmuPKQY zoStfOeiy93/A4n9uc6bANM6bKBuHEp6LnX67cocbL1SO8R9JPjimRudfzBymmKWd1w3 zDsyi0nqbNRxoAX/V406ULHsIS5rg0bNR/c/cFWQCAgAyurgDMLABCip0zSOtEl0g3FB CNDV7RXce2R0qD1rWYu41vnQOzX/9qrn6aOo0I9XzudrO9Ss9BCX2aRNEcNebAmS4YpL xQHy85N5Ut/AihL05+O2Q552q2yCoEI/R0qJi6URCu6DKp+lHWqFFkLhOXc3dIwz8Cqk YePQ== X-Gm-Message-State: AMke39khDP9HCIZp7zaoeec6eW4vSqBFt7BLhQPVXBAMhQdfSGwJK/yYIMqAm4fUx8puKsIA X-Received: by 10.223.162.205 with SMTP id t13mr9591936wra.155.1486747016598; Fri, 10 Feb 2017 09:16:56 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, keescook@chromium.org, labbott@fedoraproject.org, james.morse@arm.com Cc: kvmarm@lists.cs.columbia.edu, marc.zyngier@arm.com, christoffer.dall@linaro.org, kernel-hardening@lists.openwall.com, andre.przywara@arm.com, Ard Biesheuvel Date: Fri, 10 Feb 2017 17:16:43 +0000 Message-Id: <1486747005-15973-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486747005-15973-1-git-send-email-ard.biesheuvel@linaro.org> References: <1486747005-15973-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH 2/4] arm64: alternatives: apply boot time fixups via the linear mapping X-Virus-Scanned: ClamAV using ClamSMTP One important rule of thumb when designing a secure software system is that memory should never be writable and executable at the same time. We mostly adhere to this rule in the kernel, except at boot time, when regions may be mapped RWX until after we are done applying alternatives or making other one-off changes. For the alternative patching, we can improve the situation by applying the fixups via the linear mapping, which is never mapped with executable permissions. So map the linear alias of .text with RW- permissions initially, and remove the write permissions as soon as alternative patching has completed. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/mmu.h | 1 + arch/arm64/kernel/alternative.c | 6 ++--- arch/arm64/kernel/smp.c | 1 + arch/arm64/mm/mmu.c | 25 ++++++++++++++++---- 4 files changed, 25 insertions(+), 8 deletions(-) diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h index 47619411f0ff..5468c834b072 100644 --- a/arch/arm64/include/asm/mmu.h +++ b/arch/arm64/include/asm/mmu.h @@ -37,5 +37,6 @@ extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, unsigned long virt, phys_addr_t size, pgprot_t prot, bool page_mappings_only); extern void *fixmap_remap_fdt(phys_addr_t dt_phys); +extern void mark_linear_text_alias_ro(void); #endif diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c index 06d650f61da7..eacdbcc45630 100644 --- a/arch/arm64/kernel/alternative.c +++ b/arch/arm64/kernel/alternative.c @@ -122,7 +122,7 @@ static void __apply_alternatives(void *alt_region) pr_info_once("patching kernel code\n"); - origptr = ALT_ORIG_PTR(alt); + origptr = lm_alias(ALT_ORIG_PTR(alt)); replptr = ALT_REPL_PTR(alt); nr_inst = alt->alt_len / sizeof(insn); @@ -131,8 +131,8 @@ static void __apply_alternatives(void *alt_region) *(origptr + i) = cpu_to_le32(insn); } - flush_icache_range((uintptr_t)origptr, - (uintptr_t)(origptr + nr_inst)); + flush_icache_range((uintptr_t)ALT_ORIG_PTR(alt), + (uintptr_t)(ALT_ORIG_PTR(alt) + nr_inst)); } } diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index a8ec5da530af..d6307e311a10 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -432,6 +432,7 @@ void __init smp_cpus_done(unsigned int max_cpus) setup_cpu_features(); hyp_mode_check(); apply_alternatives_all(); + mark_linear_text_alias_ro(); } void __init smp_prepare_boot_cpu(void) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 2131521ddc24..f4b045d1cc53 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -395,16 +395,31 @@ static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end debug_pagealloc_enabled()); /* - * Map the linear alias of the [_text, __init_begin) interval as - * read-only/non-executable. This makes the contents of the - * region accessible to subsystems such as hibernate, but - * protects it from inadvertent modification or execution. + * Map the linear alias of the [_text, __init_begin) interval + * as non-executable now, and remove the write permission in + * mark_linear_text_alias_ro() below (which will be called after + * alternative patching has completed). This makes the contents + * of the region accessible to subsystems such as hibernate, + * but protects it from inadvertent modification or execution. */ __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start), - kernel_end - kernel_start, PAGE_KERNEL_RO, + kernel_end - kernel_start, PAGE_KERNEL, early_pgtable_alloc, debug_pagealloc_enabled()); } +void mark_linear_text_alias_ro(void) +{ + /* + * Remove the write permissions from the linear alias of .text/.rodata + */ + create_mapping_late(__pa_symbol(_text), (unsigned long)lm_alias(_text), + (unsigned long)__init_begin - (unsigned long)_text, + PAGE_KERNEL_RO); + + /* flush the TLBs after updating live kernel mappings */ + flush_tlb_all(); +} + static void __init map_mem(pgd_t *pgd) { struct memblock_region *reg;