From patchwork Wed Mar 29 18:16:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kees Cook X-Patchwork-Id: 9652209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ABB9F602C8 for ; Wed, 29 Mar 2017 18:17:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 93CED28510 for ; Wed, 29 Mar 2017 18:17:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 86FD92851A; Wed, 29 Mar 2017 18:17:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id AEA8728510 for ; Wed, 29 Mar 2017 18:17:40 +0000 (UTC) Received: (qmail 24154 invoked by uid 550); 29 Mar 2017 18:16:56 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 21523 invoked from network); 29 Mar 2017 18:16:36 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MqkxOKi/2mFKu7pPNBqiaH7NXqFpo6XauodqcOdgnEU=; b=NxTv+G9638ZP7LdpEeQa7pE2nUaH1TZzmDj4FEE9xi5xur+Jvp7TnIvJmzJ5/mIaSe 0jUVlPxr2yJ3yO2dSgXO78fSDtEb95vfva2YlV4z5TI+V/nC28ijIqFBIFXDX7tuLAYo /FbfyxqhjrFXh1vLv5ZHgI5tksaORKXRYaF68= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MqkxOKi/2mFKu7pPNBqiaH7NXqFpo6XauodqcOdgnEU=; b=lk1oAzzll2W5d07KRvoWbiWT+jzksvQFYjCvcZI7klhsGzzx3JYjTiBx9Lkn6WXFEw SVZbvd1DONRa+DzI7BaGK53CO+jxPAODzQ/pyrVFc4KEqPQfuPki/y2ZU3o0RMFwY00j Uf8qtiIJHNb1Y7ynwUfImMzc44bKM6Xot9YQyNJ0zpxIBwMcm/j4QeJCBoDn8GcH2AXb 4ZHWzwtLxGsbg32pyQ5ii0n5B3+xnGYRSd3ytUGBFkJQdcHZPvDisTsAI+R+FCvzRSZp mQEXoug02WONvpD7vMvk+ks+mL/Gf2j9S82SIY79esvbQW/HEACbDyz1+R1qdRUsjtyk FDbA== X-Gm-Message-State: AFeK/H2tDiSO1TTWO9ajLx4s5GrhA7/4x0JR727vm2qqlC49T9o0Aq9g3u7TAHtC32+tN/YW X-Received: by 10.99.127.29 with SMTP id a29mr1866783pgd.11.1490811384964; Wed, 29 Mar 2017 11:16:24 -0700 (PDT) From: Kees Cook To: kernel-hardening@lists.openwall.com Cc: Kees Cook , Mark Rutland , Andy Lutomirski , Hoeun Ryu , PaX Team , Emese Revfy , Russell King , x86@kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Date: Wed, 29 Mar 2017 11:16:00 -0700 Message-Id: <1490811363-93944-9-git-send-email-keescook@chromium.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490811363-93944-1-git-send-email-keescook@chromium.org> References: <1490811363-93944-1-git-send-email-keescook@chromium.org> Subject: [kernel-hardening] [RFC v2][PATCH 08/11] ARM: Implement __arch_rare_write_begin/end() X-Virus-Scanned: ClamAV using ClamSMTP Based on grsecurity's ARM pax_{open,close}_kernel() implementation, this allows HAVE_ARCH_RARE_WRITE to work on ARM. Signed-off-by: Kees Cook --- arch/arm/Kconfig | 1 + arch/arm/include/asm/domain.h | 3 ++- arch/arm/include/asm/pgtable.h | 27 +++++++++++++++++++++++++++ 3 files changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0d4e71b42c77..57b8aeaf501c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -45,6 +45,7 @@ config ARM select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU select HAVE_ARCH_MMAP_RND_BITS if MMU + select HAVE_ARCH_RARE_WRITE if MMU && !ARM_LPAE && !CPU_USE_DOMAINS select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) select HAVE_ARCH_TRACEHOOK select HAVE_ARM_SMCCC if CPU_V7 diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h index b5ca80ac823c..b3fb5c0a2efd 100644 --- a/arch/arm/include/asm/domain.h +++ b/arch/arm/include/asm/domain.h @@ -54,6 +54,7 @@ #define DOMAIN_MANAGER 3 #else #define DOMAIN_MANAGER 1 +#define DOMAIN_FORCE_MANAGER 3 #endif #define domain_mask(dom) ((3) << (2 * (dom))) @@ -118,7 +119,7 @@ static inline void set_domain(unsigned val) } #endif -#ifdef CONFIG_CPU_USE_DOMAINS +#if defined(CONFIG_CPU_USE_DOMAINS) || defined(CONFIG_HAVE_ARCH_RARE_WRITE) #define modify_domain(dom,type) \ do { \ unsigned int domain = get_domain(); \ diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 1c462381c225..104923ea9eb5 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -57,6 +57,33 @@ extern void __pgd_error(const char *file, int line, pgd_t); #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd) #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd) +#ifdef CONFIG_HAVE_ARCH_RARE_WRITE +#include +#include + +static inline int test_domain(int domain, int domaintype) +{ + return (get_domain() & domain_val(domain, 3)) == + domain_val(domain, domaintype); +} + +static inline unsigned long __arch_rare_write_begin(void) +{ + preempt_disable(); + BUG_ON(test_domain(DOMAIN_WR_RARE, DOMAIN_FORCE_MANAGER)); + modify_domain(DOMAIN_WR_RARE, DOMAIN_FORCE_MANAGER); + return 0; +} + +static inline unsigned long __arch_rare_write_end(void) +{ + BUG_ON(test_domain(DOMAIN_WR_RARE, DOMAIN_CLIENT)); + modify_domain(DOMAIN_WR_RARE, DOMAIN_CLIENT); + preempt_enable_no_resched(); + return 0; +} +#endif + /* * This is the lowest virtual address we can permit any user space * mapping to be mapped at. This is particularly important for