From patchwork Fri Jun 23 20:59:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kees Cook X-Patchwork-Id: 9807285 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 856B860349 for ; Fri, 23 Jun 2017 21:00:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7658828583 for ; Fri, 23 Jun 2017 21:00:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6ADF02867F; Fri, 23 Jun 2017 21:00:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 642D628607 for ; Fri, 23 Jun 2017 21:00:52 +0000 (UTC) Received: (qmail 17981 invoked by uid 550); 23 Jun 2017 21:00:28 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 17814 invoked from network); 23 Jun 2017 21:00:25 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9n2MafY4o1Py78ybtSrg5apYY83SCgkri//JNHWNUJc=; b=dj0oQe5JqLraCkn0roGEp41oKVKTN7JYsrvWrsyW5kHE2upGymC/1GLjXN9LBg4oLW z69NqMVAOuY/wCwd3v9tE9bQ3LCYxeN37keuNQDfJGoL0X8aRXP1PQ/e3IKLy69SrH/f tjC2a1SyASg3ac5Cq5+yYJuYjdPwJbgkReZdo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9n2MafY4o1Py78ybtSrg5apYY83SCgkri//JNHWNUJc=; b=rpklqfTVfXeghcSDhgtoQizyJhluRWPkGo7PSvyp22i+mfgnJfd5HPnx0XWTXqx3b9 rSElvofwN73M6HW5jMPtLn4QTstLXoN99L2NIRXGq8nC3CIlPGTxVwyfc1R0We/Q/L9p ZXXs1JsQ2JbCIlbLNo/lfegEBeIqy2bCxBHSzXITAEsZ8jCELey9pH/7mbn0uBtcBAOc GnUKy8YN8skPmoVI6wDl3FFP4WdQdBJ/+8CS4IDBrcPEIuthQuINcPQ52LkZLF5dz9CS kX5mxFH/mQ8SYWnDDW+nZ0pC5fKev4f8bhUBG8i/d1b/CmG7gE0LHjmdfdodmkuIT+dW 3pDg== X-Gm-Message-State: AKS2vOyY/3eiJYRYVfvvBvbNlyccwkStAYBmLhY+0Ya0E6gQN1FT/krT id3+664WPZ/4/Fc/ X-Received: by 10.99.240.69 with SMTP id s5mr2865782pgj.252.1498251612851; Fri, 23 Jun 2017 14:00:12 -0700 (PDT) From: Kees Cook To: Andrew Morton Cc: Kees Cook , stable@vger.kernel.org, Russell King , Rik van Riel , Ard Biesheuvel , Daniel Micay , Qualys Security Advisory , Russell King , Catalin Marinas , Will Deacon , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Martin Schwidefsky , Heiko Carstens , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Alexander Viro , Pratyush Anand , James Hogan , Dmitry Safonov , Grzegorz Andrejczuk , Masahiro Yamada , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-fsdevel@vger.kernel.org, kernel-hardening@lists.openwall.com Date: Fri, 23 Jun 2017 13:59:57 -0700 Message-Id: <1498251600-132458-3-git-send-email-keescook@chromium.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1498251600-132458-1-git-send-email-keescook@chromium.org> References: <1498251600-132458-1-git-send-email-keescook@chromium.org> Subject: [kernel-hardening] [PATCH v2 2/5] arm: Move ELF_ET_DYN_BASE to 4MB X-Virus-Scanned: ClamAV using ClamSMTP Now that explicitly executed loaders are loaded in the mmap region, we have more freedom to decide where we position PIE binaries in the address space to avoid possible collisions with mmap or stack regions. 4MB is chosen here mainly to have parity with x86, where this is the traditional minimum load location, likely to avoid historically requiring a 4MB page table entry when only a portion of the first 4MB would be used (since the NULL address is avoided). For ARM the position could be 0x8000, the standard ET_EXEC load address, but that is needlessly close to the NULL address, and anyone running PIE on 32-bit ARM will have an MMU, so the tight mapping is not needed. Cc: stable@vger.kernel.org Cc: Russell King Signed-off-by: Kees Cook --- arch/arm/include/asm/elf.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index d2315ffd8f12..f13ae153fb24 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h @@ -112,12 +112,8 @@ int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs); #define CORE_DUMP_USE_REGSET #define ELF_EXEC_PAGESIZE 4096 -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) +/* This is the base location for PIE (ET_DYN with INTERP) loads. */ +#define ELF_ET_DYN_BASE 0x400000UL /* When the program starts, a1 contains a pointer to a function to be registered with atexit, as per the SVR4 ABI. A value of 0 means we