From patchwork Wed Sep 20 20:45:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kees Cook X-Patchwork-Id: 9962523 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B576960208 for ; Wed, 20 Sep 2017 20:53:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A86B32920C for ; Wed, 20 Sep 2017 20:53:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9CF9A29224; Wed, 20 Sep 2017 20:53:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 36C892920C for ; Wed, 20 Sep 2017 20:53:43 +0000 (UTC) Received: (qmail 1337 invoked by uid 550); 20 Sep 2017 20:53:05 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 32704 invoked from network); 20 Sep 2017 20:53:03 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=r5x+vswUmh+buKd45B8ZY2A/QYlK3ymQmShGf2SFSEM=; b=CGh/MqFHHxl8ITsdcW+B822e7YQJWSmIDxf5R5JdPMxN2oHk++077gSb96hgCXS/+2 A/bKTjf+85TuhwGbJfAtozOJLXQ9o4d/S8QpDYQXXXkUsHA95mCXhH/5EEW49D4btv1O WJWHiWjPRyHXQrbjXcdNUuINj+EoauemlME8w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r5x+vswUmh+buKd45B8ZY2A/QYlK3ymQmShGf2SFSEM=; b=pRlBapXjnMTHQiDHvj9oJgh9FWzRI5KX5BqD62TiKz9WbmXy1vn5fswwNzXwUz/mEn 3Xsuq3eG1nz83+gi9DWjM4ClQ0a3mCUDBAhJ1Rg5eEUSsd5CtKqGbsIEeZIO8id8cuE9 AHiFvx6Qyy8pyXxPpH77TCMwBLlZcMIgPi8yP2Z7niU2VLXM1wBU5wd6N5TsoNdn/V5v +whhIG/DcPc7piHjiJLvL7UmikSwFcpAmwmnkvEZZzY4RkEEi7wBosiq/9rXid142++H LxA2mWbWRzbo5+4WI8HHXoNaoLfyOu1BLa9m07K3mXWfyShAmse3M7oF3XhU5byqlfEg H6Kw== X-Gm-Message-State: AHPjjUiAZd4+6W/QbtGjIlDxU2CKizk0Nv/UG51sMUA4czZpRUIBVfcg sybpzK6xE0bVFUe0NhKO86kljw== X-Google-Smtp-Source: AOwi7QDgw/j68/+blyqszg/lM0jrH0GWjCpvykB3+Wapql/0TftucT95m7aWqxt5mstxpt9tn9YpRQ== X-Received: by 10.84.229.71 with SMTP id d7mr3217844pln.417.1505940771447; Wed, 20 Sep 2017 13:52:51 -0700 (PDT) From: Kees Cook To: linux-kernel@vger.kernel.org Cc: Kees Cook , Russell King , Ingo Molnar , Christian Borntraeger , "Peter Zijlstra (Intel)" , linux-arm-kernel@lists.infradead.org, linux-fsdevel@vger.kernel.org, netdev@vger.kernel.org, linux-mm@kvack.org, kernel-hardening@lists.openwall.com, David Windsor Date: Wed, 20 Sep 2017 13:45:35 -0700 Message-Id: <1505940337-79069-30-git-send-email-keescook@chromium.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505940337-79069-1-git-send-email-keescook@chromium.org> References: <1505940337-79069-1-git-send-email-keescook@chromium.org> Subject: [kernel-hardening] [PATCH v3 29/31] arm: Implement thread_struct whitelist for hardened usercopy X-Virus-Scanned: ClamAV using ClamSMTP ARM does not carry FPU state in the thread structure, so it can declare no usercopy whitelist at all. Cc: Russell King Cc: Ingo Molnar Cc: Christian Borntraeger Cc: "Peter Zijlstra (Intel)" Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kees Cook --- arch/arm/Kconfig | 1 + arch/arm/include/asm/processor.h | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7888c9803eb0..4f1ab6c6b8c0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -48,6 +48,7 @@ config ARM select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU select HAVE_ARCH_MMAP_RND_BITS if MMU select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_THREAD_STRUCT_WHITELIST select HAVE_ARCH_TRACEHOOK select HAVE_ARM_SMCCC if CPU_V7 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32 diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index c3d5fc124a05..d6dc45c92ee5 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h @@ -45,6 +45,13 @@ struct thread_struct { struct debug_info debug; }; +/* Nothing needs to be usercopy-whitelisted from thread_struct. */ +static inline void arch_thread_struct_whitelist(unsigned long *offset, + unsigned long *size) +{ + *offset = *size = 0; +} + #define INIT_THREAD { } #ifdef CONFIG_MMU