diff mbox series

[v4,18/21] pinctrl: qcom: Use qcom_scm_io_update_field()

Message ID 1687955688-20809-19-git-send-email-quic_mojha@quicinc.com (mailing list archive)
State Handled Elsewhere
Headers show
Series [v4,01/21] docs: qcom: Add qualcomm minidump guide | expand

Commit Message

Mukesh Ojha June 28, 2023, 12:34 p.m. UTC 
Use qcom_scm_io_update_field() exported function introduced
in last commit.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 drivers/pinctrl/qcom/pinctrl-msm.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

Comments

Andy Shevchenko June 28, 2023, 1:44 p.m. UTC | #1 
On Wed, Jun 28, 2023 at 3:37 PM Mukesh Ojha <quic_mojha@quicinc.com> wrote:
>
> Use qcom_scm_io_update_field() exported function introduced
> in last commit.

the last

But what is that? Be more specific.

...

> +       mask = (GENMASK(2, 0) << g->intr_target_bit);

Outer parentheses are not needed.
Mukesh Ojha June 30, 2023, 2:58 p.m. UTC | #2 
Thanks for your time and suggestion.

On 6/28/2023 7:14 PM, Andy Shevchenko wrote:
> On Wed, Jun 28, 2023 at 3:37 PM Mukesh Ojha <quic_mojha@quicinc.com> wrote:
>>
>> Use qcom_scm_io_update_field() exported function introduced
>> in last commit.
> 
> the last
> 
> But what is that? Be more specific.
> 
> ...
> 
>> +       mask = (GENMASK(2, 0) << g->intr_target_bit);
> 
> Outer parentheses are not needed.

Will apply the changes.

-Mukesh

>
diff mbox series

Patch

diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index c5f52d4f7781..f31b54bf98e4 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -1041,6 +1041,7 @@  static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 	const struct msm_pingroup *g;
 	unsigned long flags;
 	bool was_enabled;
+	u32 mask;
 	u32 val;
 
 	if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) {
@@ -1075,23 +1076,20 @@  static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 	 * With intr_target_use_scm interrupts are routed to
 	 * application cpu using scm calls.
 	 */
+	mask = (GENMASK(2, 0) << g->intr_target_bit);
 	if (pctrl->intr_target_use_scm) {
 		u32 addr = pctrl->phys_base[0] + g->intr_target_reg;
 		int ret;
 
-		qcom_scm_io_readl(addr, &val);
-
-		val &= ~(7 << g->intr_target_bit);
-		val |= g->intr_target_kpss_val << g->intr_target_bit;
-
-		ret = qcom_scm_io_writel(addr, val);
+		val = g->intr_target_kpss_val << g->intr_target_bit;
+		ret = qcom_scm_io_update_field(addr, mask, val);
 		if (ret)
 			dev_err(pctrl->dev,
 				"Failed routing %lu interrupt to Apps proc",
 				d->hwirq);
 	} else {
 		val = msm_readl_intr_target(pctrl, g);
-		val &= ~(7 << g->intr_target_bit);
+		val &= ~mask;
 		val |= g->intr_target_kpss_val << g->intr_target_bit;
 		msm_writel_intr_target(val, pctrl, g);
 	}