From patchwork Thu Mar 23 17:25:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 9641679 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C1459602CA for ; Thu, 23 Mar 2017 17:25:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD76625D99 for ; Thu, 23 Mar 2017 17:25:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A1DED2841E; Thu, 23 Mar 2017 17:25:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 9862025D99 for ; Thu, 23 Mar 2017 17:25:43 +0000 (UTC) Received: (qmail 18409 invoked by uid 550); 23 Mar 2017 17:25:37 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 18215 invoked from network); 23 Mar 2017 17:25:36 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rXO8OHL9CNlEl/3bbA4Xs9y6KMdDqWjxFIB9J6CYYy0=; b=Xgpbku9g8V420x+ZzxeNOjds/Priwomx64JgGoNUvOCaS3vkkSt7oYWrxMPq2uo0T5 ji0cFxZz0BiYJeENiiByeMB9gI9lS6od+xpNHHRdocx7pIFBxmgTptwCl9Mp2JF+VfKm yAKINr6S3ZKR/xnNfvIJEKkM6Dr+8nBcRhE8q6j7V7cg4xi3yiZuqceiq9j5fSDe7WbJ y3aZ+9hz4rubfH6VH7MYAE5o5LO6HdCzA35FtbP4Ev8wnqYW5RmyPOxJu0kkubXVqS/E xQltrIvDiELti0D5podvMpS17S+lOwaxQ5dMaaqYYCvbXofNeT2kj73zwIOKMZRzaKK7 PzEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rXO8OHL9CNlEl/3bbA4Xs9y6KMdDqWjxFIB9J6CYYy0=; b=nH/MFdJl2eRgOH/socqTmQ1njYuUcubf6gkSbdERDOc/ztid6IsBY4cA7WudHM8Kgc iIoqjSR8S9yt2Qw252Pj6rQUxI2ALPCJu9YlNAi5YZS4kEWkT6IBIAuVMjnX6QI3vemH sdrRHPpzFuieCTSRLsgH5ZjHYsdwHCmNRRvcuGfvsImzGWghUokvWy/Z4Hs4a8ukl0pp 3VWbNN9yBqxwx3eTwVEw5HE/ECzZfe34fg7DYtMW6DPipF4YCtAnDEWe1A0N8kayPkgB mlwbhG0KAE3Jz8rDOQd8BdgOfD+PVt9FGH6lO5XLuuX36jddmMhZ/MUtyEStmGq5yWHn BreA== X-Gm-Message-State: AFeK/H1NRxBB1d2t4SjQkPy5RThxWashugGnXO206KM3jNlwzr6R10/Epqje7yLpxVGunyhq X-Received: by 10.98.86.152 with SMTP id h24mr4245414pfj.184.1490289924024; Thu, 23 Mar 2017 10:25:24 -0700 (PDT) From: Thomas Garnier To: Martin Schwidefsky , Heiko Carstens , David Howells , Arnd Bergmann , Dave Hansen , Al Viro , Thomas Gleixner , =?UTF-8?q?Ren=C3=A9=20Nyffenegger?= , Thomas Garnier , Andrew Morton , "Paul E . McKenney" , Ingo Molnar , Oleg Nesterov , Pavel Tikhomirov , Stephen Smalley , Ingo Molnar , "H . Peter Anvin" , Andy Lutomirski , Paolo Bonzini , Rik van Riel , Kees Cook , Josh Poimboeuf , Borislav Petkov , Brian Gerst , "Kirill A . Shutemov" , Christian Borntraeger , Russell King , Will Deacon , Catalin Marinas , Mark Rutland , James Morse Cc: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org, x86@kernel.org, linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com Date: Thu, 23 Mar 2017 10:25:13 -0700 Message-Id: <20170323172515.27950-2-thgarnie@google.com> X-Mailer: git-send-email 2.12.1.500.gab5fba24ee-goog In-Reply-To: <20170323172515.27950-1-thgarnie@google.com> References: <20170323172515.27950-1-thgarnie@google.com> Subject: [kernel-hardening] [PATCH v5 2/4] x86/syscalls: Specific usage of verify_pre_usermode_state X-Virus-Scanned: ClamAV using ClamSMTP Implement specific usage of verify_pre_usermode_state for user-mode returns for x86. Signed-off-by: Thomas Garnier --- Based on next-20170322 --- arch/x86/Kconfig | 1 + arch/x86/entry/common.c | 3 +++ arch/x86/entry/entry_64.S | 8 ++++++++ arch/x86/include/asm/pgtable_64_types.h | 11 +++++++++++ arch/x86/include/asm/processor.h | 11 ----------- 5 files changed, 23 insertions(+), 11 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 0e1bdadc8222..f48c96b834b5 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -63,6 +63,7 @@ config X86 select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_MIGHT_HAVE_PC_SERIO + select ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c index cdefcfdd9e63..76ef050255c9 100644 --- a/arch/x86/entry/common.c +++ b/arch/x86/entry/common.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -183,6 +184,8 @@ __visible inline void prepare_exit_to_usermode(struct pt_regs *regs) struct thread_info *ti = current_thread_info(); u32 cached_flags; + verify_pre_usermode_state(); + if (IS_ENABLED(CONFIG_PROVE_LOCKING) && WARN_ON(!irqs_disabled())) local_irq_disable(); diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index d2b2a2948ffe..c079b010205c 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -218,6 +218,14 @@ entry_SYSCALL_64_fastpath: testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) jnz 1f + /* + * If address limit is not based on user-mode, jump to slow path for + * additional security checks. + */ + movq $TASK_SIZE_MAX, %rcx + cmp %rcx, TASK_addr_limit(%r11) + jnz 1f + LOCKDEP_SYS_EXIT TRACE_IRQS_ON /* user mode is traced as IRQs on */ movq RIP(%rsp), %rcx diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h index 516593e66bd6..12fa851c7fa8 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -78,4 +78,15 @@ typedef struct { pteval_t pte; } pte_t; #define EARLY_DYNAMIC_PAGE_TABLES 64 +/* + * User space process size. 47bits minus one guard page. The guard + * page is necessary on Intel CPUs: if a SYSCALL instruction is at + * the highest possible canonical userspace address, then that + * syscall will enter the kernel with a non-canonical return + * address, and SYSRET will explode dangerously. We avoid this + * particular problem by preventing anything from being mapped + * at the maximum canonical address. + */ +#define TASK_SIZE_MAX ((_AC(1, UL) << 47) - PAGE_SIZE) + #endif /* _ASM_X86_PGTABLE_64_DEFS_H */ diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3cada998a402..e80822582d3e 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -825,17 +825,6 @@ static inline void spin_lock_prefetch(const void *x) #define KSTK_ESP(task) (task_pt_regs(task)->sp) #else -/* - * User space process size. 47bits minus one guard page. The guard - * page is necessary on Intel CPUs: if a SYSCALL instruction is at - * the highest possible canonical userspace address, then that - * syscall will enter the kernel with a non-canonical return - * address, and SYSRET will explode dangerously. We avoid this - * particular problem by preventing anything from being mapped - * at the maximum canonical address. - */ -#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE) - /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */