From patchwork Tue Apr 4 17:47:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 9662271 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8A0AC6032D for ; Tue, 4 Apr 2017 17:48:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DEFA283A6 for ; Tue, 4 Apr 2017 17:48:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7265A28520; Tue, 4 Apr 2017 17:48:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 6BED0283A6 for ; Tue, 4 Apr 2017 17:48:00 +0000 (UTC) Received: (qmail 13851 invoked by uid 550); 4 Apr 2017 17:47:51 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 13790 invoked from network); 4 Apr 2017 17:47:48 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=F2r/bowGbPJ02ILODBxOkHGXh5AlM1K5mOW6sg85vpg=; b=UZM6/uletXSRDT0nUqtAw1xR0ZupDV8Dlw07exth7T6TFYIlLcIezXPCvbcEJkVfLj F3z0Fzchjqah7jLmFU+sx/gNnoH7nNiFqvKCF2KYDTgUzfVE2mjf1+TvR6dvEePQxuwI XNy7/9h+byoG7aXXHdLGXhOjuHaRqi7MRXB6ERYFi+vstUnmwY0AO28PIEXbPBnDeLwB liCCIBtoIVQ2Z6JRiDdR7wPOieGsPNWKm9B/gKkR4pdj88gfdMqlhKagy3Ac1HUh+10g H+rUH9V7GlvLYzbZreYXJEAtJxyak/xpha6AGeKkEYD8ynZJg3N45BnqXFK1dswdwnuj 6ZOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=F2r/bowGbPJ02ILODBxOkHGXh5AlM1K5mOW6sg85vpg=; b=mSns75+ju/4Sv4F1pfaJ/ocWJIXuBpK5Ffaevd1IrNkJCZKTVoE3wnrY+3VTy+EFO4 WjyHhYhV6srLBbB9jQzq/F9fR0PYPDtF9949+02TY4J+hFLd6Z89oO+JtlIuUBkt904C LDbjeKVpPcDgDl+NrZ9FdT2jhRZDPpHXglt2Tf6fUBhjmolVcZyu6M0Uxm672uY+deBY OWDKhgLcv5LO+Jg05DH5ZAvu6tbxFgrHVWEzHd5EFab7xCEKsS2P5a/HdZ+VBIYfUbFp KIgzzEyTisddYySHNAY/a2u6mTwh0Eyfjm2npalsOo8VcvZ09aoEg73INaIMzoenzlH5 3j9A== X-Gm-Message-State: AFeK/H2So0nFuq8+Yk722QgbZsf1UKVDW0gJ+Qyt+Ufjr0alfXVABmst7PiytDLsQhxZiGVu X-Received: by 10.84.239.8 with SMTP id w8mr30271971plk.73.1491328056758; Tue, 04 Apr 2017 10:47:36 -0700 (PDT) From: Thomas Garnier To: Martin Schwidefsky , Heiko Carstens , Dave Hansen , Arnd Bergmann , Thomas Gleixner , Al Viro , David Howells , Thomas Garnier , =?UTF-8?q?Ren=C3=A9=20Nyffenegger?= , Andrew Morton , "Paul E . McKenney" , Ingo Molnar , Oleg Nesterov , Stephen Smalley , Pavel Tikhomirov , Ingo Molnar , "H . Peter Anvin" , Andy Lutomirski , Paolo Bonzini , Kees Cook , Rik van Riel , Josh Poimboeuf , Borislav Petkov , Brian Gerst , "Kirill A . Shutemov" , Christian Borntraeger , Russell King , Will Deacon , Catalin Marinas , Mark Rutland , James Morse Cc: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org, x86@kernel.org, linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com Date: Tue, 4 Apr 2017 10:47:25 -0700 Message-Id: <20170404174727.35478-2-thgarnie@google.com> X-Mailer: git-send-email 2.12.2.715.g7642488e1d-goog In-Reply-To: <20170404174727.35478-1-thgarnie@google.com> References: <20170404174727.35478-1-thgarnie@google.com> Subject: [kernel-hardening] [PATCH v6 2/4] x86/syscalls: Specific usage of verify_pre_usermode_state X-Virus-Scanned: ClamAV using ClamSMTP Implement specific usage of verify_pre_usermode_state for user-mode returns for x86. Signed-off-by: Thomas Garnier --- Based on next-20170404 --- arch/x86/Kconfig | 1 + arch/x86/entry/common.c | 3 +++ arch/x86/entry/entry_64.S | 8 ++++++++ arch/x86/include/asm/pgtable_64_types.h | 11 +++++++++++ arch/x86/include/asm/processor.h | 11 ----------- 5 files changed, 23 insertions(+), 11 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 9a5af1e1cd61..3d7eb9298f2d 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -63,6 +63,7 @@ config X86 select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_MIGHT_HAVE_PC_SERIO + select ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c index cdefcfdd9e63..76ef050255c9 100644 --- a/arch/x86/entry/common.c +++ b/arch/x86/entry/common.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -183,6 +184,8 @@ __visible inline void prepare_exit_to_usermode(struct pt_regs *regs) struct thread_info *ti = current_thread_info(); u32 cached_flags; + verify_pre_usermode_state(); + if (IS_ENABLED(CONFIG_PROVE_LOCKING) && WARN_ON(!irqs_disabled())) local_irq_disable(); diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index d2b2a2948ffe..c079b010205c 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -218,6 +218,14 @@ entry_SYSCALL_64_fastpath: testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) jnz 1f + /* + * If address limit is not based on user-mode, jump to slow path for + * additional security checks. + */ + movq $TASK_SIZE_MAX, %rcx + cmp %rcx, TASK_addr_limit(%r11) + jnz 1f + LOCKDEP_SYS_EXIT TRACE_IRQS_ON /* user mode is traced as IRQs on */ movq RIP(%rsp), %rcx diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h index 516593e66bd6..12fa851c7fa8 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -78,4 +78,15 @@ typedef struct { pteval_t pte; } pte_t; #define EARLY_DYNAMIC_PAGE_TABLES 64 +/* + * User space process size. 47bits minus one guard page. The guard + * page is necessary on Intel CPUs: if a SYSCALL instruction is at + * the highest possible canonical userspace address, then that + * syscall will enter the kernel with a non-canonical return + * address, and SYSRET will explode dangerously. We avoid this + * particular problem by preventing anything from being mapped + * at the maximum canonical address. + */ +#define TASK_SIZE_MAX ((_AC(1, UL) << 47) - PAGE_SIZE) + #endif /* _ASM_X86_PGTABLE_64_DEFS_H */ diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3cada998a402..e80822582d3e 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -825,17 +825,6 @@ static inline void spin_lock_prefetch(const void *x) #define KSTK_ESP(task) (task_pt_regs(task)->sp) #else -/* - * User space process size. 47bits minus one guard page. The guard - * page is necessary on Intel CPUs: if a SYSCALL instruction is at - * the highest possible canonical userspace address, then that - * syscall will enter the kernel with a non-canonical return - * address, and SYSRET will explode dangerously. We avoid this - * particular problem by preventing anything from being mapped - * at the maximum canonical address. - */ -#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE) - /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */