From patchwork Mon Apr 10 16:44:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 9673335 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D46F6600CB for ; Mon, 10 Apr 2017 16:44:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D536328174 for ; Mon, 10 Apr 2017 16:44:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C9B6F28179; Mon, 10 Apr 2017 16:44:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id BB7302838E for ; Mon, 10 Apr 2017 16:44:47 +0000 (UTC) Received: (qmail 7596 invoked by uid 550); 10 Apr 2017 16:44:40 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 7471 invoked from network); 10 Apr 2017 16:44:38 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VzI1LPxuOA2LNykf/VrSuwao+DJFkpwXfUHz17i1BgA=; b=dVk4gLbS4A5qBTVgKTyOg4a4NNOhTcQcqIYCO18yiHV7VUu34IpWKo0SZNGY1NZg0f tk48qSftop11nSNEGsncqC4TOFsbxKq6doYXEOVyhlKHiDyf/XOwTUs0dG0Hx6em+3ua VJRtBTdSLozuKfAYwwTl5h5BNIUHaWfpHglOmpKtyPKCgKcPGDhP0/CDV/m9FWWWbGlE B3VIja7DPrKGQPWczx3wB08mAqkBTNWaH1S8Q48pOzPELiBmOd2TTJgL5PiRATUkio7E 67BLUpiTB+BclfAM9MIzYtE01j0utMEQfJFrJRfS4YlWXOuw51UaCZJNSIJYUSSNBGK9 YDKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VzI1LPxuOA2LNykf/VrSuwao+DJFkpwXfUHz17i1BgA=; b=M3n8j3Bz9/7nXpxxso/YlporjRxdC9wEI6hownunkbkfTupGkzzq+okt5rnxGkj36P h0e3gjVl9tsZfkRQYlXFZCHRJORecK783WWuh+hCkZ54G2UO9quV7pTX4+lBmpXnvAwY tk3wQNtZ6K039f5h89WYtp0rBaf1qOyyFB9y+LqbNVeVX3nJvDeVVX4GIay02B5YgREE myAmZpCu0CtKLEfIME6jbqo/AmE3mYX4WVX/Soi9nPZCG3XAPX8HdZajEQ1nYAyq7lmb YgfpuUfhjHbmWSIxRdW5yF1EZfm5cZ2zVahR5NMQvAQ5aWVWplJhZwFN8jl1/ANljaDE Kc1A== X-Gm-Message-State: AFeK/H0GvZ5IbwUg2BSBSFDSEzINR5HSwTlRBDr0gk2SZx6Bi0+H15tZqi6WETccqpjJ9vLl X-Received: by 10.98.60.141 with SMTP id b13mr25266826pfk.137.1491842666579; Mon, 10 Apr 2017 09:44:26 -0700 (PDT) From: Thomas Garnier To: Martin Schwidefsky , Heiko Carstens , Arnd Bergmann , Dave Hansen , Andrew Morton , Thomas Garnier , David Howells , =?UTF-8?q?Ren=C3=A9=20Nyffenegger?= , "Paul E . McKenney" , Ingo Molnar , Thomas Gleixner , Oleg Nesterov , Stephen Smalley , Pavel Tikhomirov , Ingo Molnar , "H . Peter Anvin" , Andy Lutomirski , Paolo Bonzini , Kees Cook , Rik van Riel , Josh Poimboeuf , Borislav Petkov , Brian Gerst , "Kirill A . Shutemov" , Christian Borntraeger , Russell King , Will Deacon , Catalin Marinas , Mark Rutland , James Morse Cc: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org, x86@kernel.org, linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com Date: Mon, 10 Apr 2017 09:44:18 -0700 Message-Id: <20170410164420.64003-2-thgarnie@google.com> X-Mailer: git-send-email 2.12.2.715.g7642488e1d-goog In-Reply-To: <20170410164420.64003-1-thgarnie@google.com> References: <20170410164420.64003-1-thgarnie@google.com> Subject: [kernel-hardening] [PATCH v7 2/4] x86/syscalls: Architecture specific pre-usermode check X-Virus-Scanned: ClamAV using ClamSMTP Disable the generic pre-usermode check in favor of an optimized implementation. This patch adds specific checks on user-mode return path to make it faster and smaller. The user-mode state check is added to the prepare_exit_to_usermode function. This function is called before any user-mode return on 32-bit and on the 64-bit syscall slowpath. For the 64-bit syscall fast path, an assembly address limit check redirects to the slow path if the address limit is different. The TASK_SIZE_MAX define is moved to the pgtable_64_types header so it can be used in assembly code. Signed-off-by: Thomas Garnier --- Based on next-20170410 --- arch/x86/Kconfig | 1 + arch/x86/entry/common.c | 3 +++ arch/x86/entry/entry_64.S | 8 ++++++++ arch/x86/include/asm/pgtable_64_types.h | 11 +++++++++++ arch/x86/include/asm/processor.h | 11 ----------- 5 files changed, 23 insertions(+), 11 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c43f47622440..74185795eb24 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -63,6 +63,7 @@ config X86 select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_MIGHT_HAVE_PC_SERIO + select ARCH_NO_SYSCALL_VERIFY_PRE_USERMODE_STATE select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c index cdefcfdd9e63..76ef050255c9 100644 --- a/arch/x86/entry/common.c +++ b/arch/x86/entry/common.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -183,6 +184,8 @@ __visible inline void prepare_exit_to_usermode(struct pt_regs *regs) struct thread_info *ti = current_thread_info(); u32 cached_flags; + verify_pre_usermode_state(); + if (IS_ENABLED(CONFIG_PROVE_LOCKING) && WARN_ON(!irqs_disabled())) local_irq_disable(); diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 607d72c4a485..62aca6dcdaf4 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -218,6 +218,14 @@ entry_SYSCALL_64_fastpath: testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) jnz 1f + /* + * If address limit is not based on user-mode, jump to slow path for + * additional security checks. + */ + movq $TASK_SIZE_MAX, %rcx + cmp %rcx, TASK_addr_limit(%r11) + jne 1f + LOCKDEP_SYS_EXIT TRACE_IRQS_ON /* user mode is traced as IRQs on */ movq RIP(%rsp), %rcx diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h index 06470da156ba..78af4d43a7ce 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -104,4 +104,15 @@ typedef struct { pteval_t pte; } pte_t; #define EARLY_DYNAMIC_PAGE_TABLES 64 +/* + * User space process size. 47bits minus one guard page. The guard + * page is necessary on Intel CPUs: if a SYSCALL instruction is at + * the highest possible canonical userspace address, then that + * syscall will enter the kernel with a non-canonical return + * address, and SYSRET will explode dangerously. We avoid this + * particular problem by preventing anything from being mapped + * at the maximum canonical address. + */ +#define TASK_SIZE_MAX ((_AC(1, UL) << 47) - PAGE_SIZE) + #endif /* _ASM_X86_PGTABLE_64_DEFS_H */ diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3cada998a402..e80822582d3e 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -825,17 +825,6 @@ static inline void spin_lock_prefetch(const void *x) #define KSTK_ESP(task) (task_pt_regs(task)->sp) #else -/* - * User space process size. 47bits minus one guard page. The guard - * page is necessary on Intel CPUs: if a SYSCALL instruction is at - * the highest possible canonical userspace address, then that - * syscall will enter the kernel with a non-canonical return - * address, and SYSRET will explode dangerously. We avoid this - * particular problem by preventing anything from being mapped - * at the maximum canonical address. - */ -#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE) - /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */