From patchwork Mon Aug 14 12:54:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9898841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D103D602BA for ; Mon, 14 Aug 2017 12:58:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C578D285E3 for ; Mon, 14 Aug 2017 12:58:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BA421285FD; Mon, 14 Aug 2017 12:58:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id B6C48285E3 for ; Mon, 14 Aug 2017 12:58:33 +0000 (UTC) Received: (qmail 26576 invoked by uid 550); 14 Aug 2017 12:55:49 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 26368 invoked from network); 14 Aug 2017 12:55:43 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DAND2XD3kjOA0RcWuz9DTmMk6MB5qPNgPKjRXnDHKjU=; b=P8wfozqvIqRXlMEuU8HKbPklM2ba66P7lVGTAkD1N5g8CyF0JFtREerbc6ImfOwBm4 IUQlS7NEFmXTbT/PmRBnDd7sRZyWVYUI28l5M8MGXipgOV2XSHPAGPZNtUemYesFckjk 6u11XFDSufg8a8RrWddHwK2XNkVqlCQrI73Sw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DAND2XD3kjOA0RcWuz9DTmMk6MB5qPNgPKjRXnDHKjU=; b=SjpDRW5LFZh+/ngVKvNhjKAF1QW9C4GOyf/i+ESRRTogPmFi4CDl74S+I+NHG/cVTp mwygWGl/zvxSjx5g/ILrR2mMYq1Kg9G5oTKwvZ8fPjH1fjSg39uv3Mg4BOUQkFH5gWws N+wTbsyxagAp3ULC92r/EOlNs2ZEiogRqjQtqGWMkQwx6b/YfFG1Sc/0PpChbwfsTpLU nKsdSyRnb31aUGJ8PVNIPwoeecLMftbpTA49QTTrftvX0xdtgs2xOUdKwDTD2JVrT/pC w096dPLhFUdrZ22eDLDmGTj0TM8Gvmo4LG+Lz6SlIK0w8H0TiAgd5dYLqd6SHKARhVm3 hM+A== X-Gm-Message-State: AHYfb5iWySF1o6FPC0uFbAANkUPNZNsc8+SPLpS/wyeL+Aw5H7j/1cl6 sc2em1PI/Y1vNvqGagjsog== X-Received: by 10.223.171.85 with SMTP id r21mr15669479wrc.88.1502715332245; Mon, 14 Aug 2017 05:55:32 -0700 (PDT) From: Ard Biesheuvel To: kernel-hardening@lists.openwall.com Cc: linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Arnd Bergmann , Nicolas Pitre , Russell King , Kees Cook , Thomas Garnier , Marc Zyngier , Mark Rutland , Tony Lindgren , Matt Fleming , Dave Martin Date: Mon, 14 Aug 2017 13:54:01 +0100 Message-Id: <20170814125411.22604-21-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170814125411.22604-1-ard.biesheuvel@linaro.org> References: <20170814125411.22604-1-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH 20/30] ARM: kernel: use PC relative symbol references in suspend/resume code X-Virus-Scanned: ClamAV using ClamSMTP Replace some unnecessary absolute references with relative ones. Also, to prepare for runtime relocation, which occurs with the caches on, defer taking the absolute address of cpu_resume_after_mmu() until after the MMU is enabled. Cc: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/sleep.S | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index 3026b119d3ff..9efd1c7d3552 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -60,18 +60,17 @@ ENTRY(__cpu_suspend) stmfd sp!, {r4 - r11, lr} #ifdef MULTI_CPU - ldr r10, =processor - ldr r4, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state + ldr_l r4, processor + CPU_SLEEP_SIZE @ size of CPU sleep state #else - ldr r4, =cpu_suspend_size + adr_l r4, cpu_suspend_size #endif mov r5, sp @ current virtual SP add r4, r4, #12 @ Space for pgd, virt sp, phys resume fn sub sp, sp, r4 @ allocate CPU state on stack - ldr r3, =sleep_save_sp + adr_l r3, sleep_save_sp stmfd sp!, {r0, r1} @ save suspend func arg and pointer ldr r3, [r3, #SLEEP_SAVE_SP_VIRT] - ALT_SMP(ldr r0, =mpidr_hash) + ALT_SMP(adr_l r0, mpidr_hash) ALT_UP_B(1f) /* This ldmia relies on the memory layout of the mpidr_hash struct */ ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts @@ -100,13 +99,13 @@ ENDPROC(cpu_suspend_abort) .align 5 .pushsection .idmap.text,"ax" ENTRY(cpu_resume_mmu) - ldr r3, =cpu_resume_after_mmu instr_sync mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc mrc p15, 0, r0, c0, c0, 0 @ read id reg instr_sync mov r0, r0 mov r0, r0 + ldr r3, =cpu_resume_after_mmu ret r3 @ jump to virtual address ENDPROC(cpu_resume_mmu) .popsection