From patchwork Mon Aug 14 12:53:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9898791 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DACA6602BA for ; Mon, 14 Aug 2017 12:55:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF80D285F2 for ; Mon, 14 Aug 2017 12:55:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C3C562860E; Mon, 14 Aug 2017 12:55:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 05A2F285F2 for ; Mon, 14 Aug 2017 12:55:04 +0000 (UTC) Received: (qmail 18204 invoked by uid 550); 14 Aug 2017 12:54:51 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 17837 invoked from network); 14 Aug 2017 12:54:47 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7y3BXLxnHPNjtMD9ykW39Ow4QRSTjd8ME9ogKXudgBw=; b=U1iYrhXWPprPk44/WSZmGw7FzKsD2yrHzNGNz1bMb1//Zq0h9fDnAC1W8eBnU8wRDE VDV9Gk/SYYq84B/64JFd2DxWOQk1rAa6Xd9VJ63P6DmHdMISD0BeOQ0ihtmXu4SM8zIb MXXX5USEOQBRHqIiWoZnmucs/L8iWnDfXL5dw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7y3BXLxnHPNjtMD9ykW39Ow4QRSTjd8ME9ogKXudgBw=; b=sZkmiVCaZbtquRq76iCHVhqXcs7O5Q/MzgLpWt2mVqqjeFDDUDjq1Cm4UJ5ECDd6q1 pZkFc/kViVKty/rBpAPE+utEjkiPG+hdmOFwsBvgbpqarQJDnmJq8G+MNJbE1tdUG7cm 7P+nXsVCdtmJ5x+41A3h+xlZH8gdCRiJGsip6mQSVCEWNVnP5cNSSYa9MNzirvZu9csh wAhkAKd6MX9yveIr0tB6C8/MiNmQyHOPHqjJuL4JF7T+MCognKrg1sYMY0OHKQzVOxDn wmi8hazPTPI4yiZ7ZFoO3PRrNI8fGSd+1SqSZsPmJ+GVrrlSkIQW7BKTVLC2RCBmApBA 9zJw== X-Gm-Message-State: AHYfb5gRd5V/zQ6j6SjEqLLB99RImRT92HJIQ6i6TqRYF7Lk/JUBMh/s 4cyrdn3Jpw0Tp/GEQbBygw== X-Received: by 10.223.160.139 with SMTP id m11mr15266955wrm.142.1502715276122; Mon, 14 Aug 2017 05:54:36 -0700 (PDT) From: Ard Biesheuvel To: kernel-hardening@lists.openwall.com Cc: linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Arnd Bergmann , Nicolas Pitre , Russell King , Kees Cook , Thomas Garnier , Marc Zyngier , Mark Rutland , Tony Lindgren , Matt Fleming , Dave Martin Date: Mon, 14 Aug 2017 13:53:44 +0100 Message-Id: <20170814125411.22604-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170814125411.22604-1-ard.biesheuvel@linaro.org> References: <20170814125411.22604-1-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH 03/30] ARM: head-common.S: use PC-relative insn sequence for __proc_info X-Virus-Scanned: ClamAV using ClamSMTP Replace the open coded PC relative offset calculations with a pair of adr_l invocations. This ensures these quantities are invariant under runtime relocation. Cc: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/head-common.S | 22 ++++++-------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S index 8733012d231f..06035488130c 100644 --- a/arch/arm/kernel/head-common.S +++ b/arch/arm/kernel/head-common.S @@ -150,11 +150,12 @@ ENDPROC(lookup_processor_type) * r9 = cpuid (preserved) */ __lookup_processor_type: - adr r3, __lookup_processor_type_data - ldmia r3, {r4 - r6} - sub r3, r3, r4 @ get offset between virt&phys - add r5, r5, r3 @ convert virt addresses to - add r6, r6, r3 @ physical address space + /* + * Look in for information about the __proc_info + * structure. + */ + adr_l r5, __proc_info_begin + adr_l r6, __proc_info_end 1: ldmia r5, {r3, r4} @ value, mask and r4, r4, r9 @ mask wanted bits teq r3, r4 @@ -166,17 +167,6 @@ __lookup_processor_type: 2: ret lr ENDPROC(__lookup_processor_type) -/* - * Look in for information about the __proc_info structure. - */ - .align 2 - .type __lookup_processor_type_data, %object -__lookup_processor_type_data: - .long . - .long __proc_info_begin - .long __proc_info_end - .size __lookup_processor_type_data, . - __lookup_processor_type_data - __error_lpae: #ifdef CONFIG_DEBUG_LL adr r0, str_lpae