From patchwork Mon Aug 14 12:53:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9898793 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 406B9602BA for ; Mon, 14 Aug 2017 12:55:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 35B29285E3 for ; Mon, 14 Aug 2017 12:55:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A40528602; Mon, 14 Aug 2017 12:55:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 4E4EE285E3 for ; Mon, 14 Aug 2017 12:55:24 +0000 (UTC) Received: (qmail 18427 invoked by uid 550); 14 Aug 2017 12:54:53 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 18159 invoked from network); 14 Aug 2017 12:54:51 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H0cG3/ha0K93rVBrXvlrPqfdbkpdwBqPpuoPWQfWjqU=; b=e8cWfzPZjXru4HOwQ+BsAXQuInIeN98fkgLdyhHp4wIkBNn4UcMEg4cKpZjBzUYREA zEFbITv1gkZp1G4LQPFHKla4zeG2A9QTLLdmsCIAv9l6AZVXGwNxNpgYByETa8E4MB8E Wdw2UuFKobTybzjH9DuxqJvXiwtdcvNyUXdXk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=H0cG3/ha0K93rVBrXvlrPqfdbkpdwBqPpuoPWQfWjqU=; b=rFyJP+ZA94IRcOy41nlfGXes9ZbDeUFmgb9bPkiGAFYeVwH8k+VO47/HRSVgef9+m1 ZKrObYFjvL4CMqYiqULZLojP1AWZN5s8ZAhabe1fi5fmOWzm4cxB4Sx5FGUzL0KiRkr2 DX4PLXYNj0lFOwlLzruVAuNfLyYUKrVejQf0cKPqc13ZfgL3Q7s4pzqUfTjfUa7WQC3V BE+Ez76Y28CPhgZiM2qh8j9nDNo1KOLJFnUKj0Z3hvMUQo5x/c8XoJiOwmurLWQQvdKM Od19bLTBe+J3HneztJ/+FQRwsAXkO8i43EPogEbwHp9XahZoZQzX8Rkok9SKye4lFVpF HyCA== X-Gm-Message-State: AHYfb5gbUmeGdw0K5IjBw6kO2a+7GUHCzAziBwV8qQKI44G6MNkhW75H MXOjN0hf7e0mMKllmNfjtQ== X-Received: by 10.28.24.210 with SMTP id 201mr4044654wmy.65.1502715279645; Mon, 14 Aug 2017 05:54:39 -0700 (PDT) From: Ard Biesheuvel To: kernel-hardening@lists.openwall.com Cc: linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Arnd Bergmann , Nicolas Pitre , Russell King , Kees Cook , Thomas Garnier , Marc Zyngier , Mark Rutland , Tony Lindgren , Matt Fleming , Dave Martin Date: Mon, 14 Aug 2017 13:53:45 +0100 Message-Id: <20170814125411.22604-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170814125411.22604-1-ard.biesheuvel@linaro.org> References: <20170814125411.22604-1-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH 04/30] ARM: head-common.S: use PC-relative insn sequence for idmap creation X-Virus-Scanned: ClamAV using ClamSMTP Replace the open coded PC relative offset calculations involving __turn_mmu_on and __turn_mmu_on_end with a pair of adr_l invocations. This ensures these quantities are invariant under runtime relocation. Cc: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/head.S | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 04286fd9e09c..0a98aec0e39d 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -227,11 +227,8 @@ __create_page_tables: * Create identity mapping to cater for __enable_mmu. * This identity mapping will be removed by paging_init(). */ - adr r0, __turn_mmu_on_loc - ldmia r0, {r3, r5, r6} - sub r0, r0, r3 @ virt->phys offset - add r5, r5, r0 @ phys __turn_mmu_on - add r6, r6, r0 @ phys __turn_mmu_on_end + adr_l r5, __turn_mmu_on @ _pa(__turn_mmu_on) + adr_l r6, __turn_mmu_on_end @ _pa(__turn_mmu_on_end) mov r5, r5, lsr #SECTION_SHIFT mov r6, r6, lsr #SECTION_SHIFT @@ -354,11 +351,6 @@ __create_page_tables: ret lr ENDPROC(__create_page_tables) .ltorg - .align -__turn_mmu_on_loc: - .long . - .long __turn_mmu_on - .long __turn_mmu_on_end #if defined(CONFIG_SMP) .text