From patchwork Sun Sep 3 12:07:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9936127 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 01E936037D for ; Sun, 3 Sep 2017 12:10:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6ECD286B3 for ; Sun, 3 Sep 2017 12:10:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB629286B5; Sun, 3 Sep 2017 12:10:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id E420C286B3 for ; Sun, 3 Sep 2017 12:10:05 +0000 (UTC) Received: (qmail 11838 invoked by uid 550); 3 Sep 2017 12:08:59 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 11702 invoked from network); 3 Sep 2017 12:08:57 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fzZxwWiKrc2WBmDoaNRbXV/9kTialUhlgKWvC3CUnsQ=; b=TQIS1j61KBPEomPOMm2RqqwfegFauqYYx4hE2fbt7JBczSMjX5X5lJ+zGfa0XfBSQ5 UKC0V+ifwurtxOXg455jXMKcHTxhNnDUXslGn9VNP7rNjWwlJAQp1+1REaNDsFlLOdog 8o7W5pmdlnZYvTPLeIA7yi2pCCF+MzR7LNl4w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fzZxwWiKrc2WBmDoaNRbXV/9kTialUhlgKWvC3CUnsQ=; b=qoUaylVpavGdSKwVdKEOHkyr+kVzOJTE4NMBpSZpxr/v6BypclyVGDUuvJFe5kqRcc UuuGT9RqZbLQgyWNG+cfDJlBQHO1I9V3q8aBAhoAu9unp0kb+wThcidVktHF2SrfuI2L A9GzyrIl/IAR9A2IbJKxxqSRWTwh4+AJRlcROoo1nV6j6uhjlT9FNqg83r76BI0BKVPX pt5ImAmvuLqwGOsvjznE/9jjntus6iRgfPvfRgbIYsaajPCEQ+6ANtmPGM3J5uWcWDRI jkAe9Xnlwomfzsa8CrukXM3J6NcKqgUWJuZDgcjo4rzILxoBF1ankqUdY9ot2st4Wg4r wL3w== X-Gm-Message-State: AHPjjUh/4L9wy8KTlKwF3cdkHND+QL1DfpcSby8MblPct9Jli/Eo8N6y 7pLa3dHwgPNsVktg X-Google-Smtp-Source: ADKCNb7sRxRBJ9JOlSDPUEyNTjbRrt3doJccDEaezCxJkLvaR0sotsBTu0VEvc6OwyII0zvpZIAlHg== X-Received: by 10.28.127.195 with SMTP id a186mr1940802wmd.107.1504440526033; Sun, 03 Sep 2017 05:08:46 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com Cc: Ard Biesheuvel , Arnd Bergmann , Nicolas Pitre , Russell King , Kees Cook , Thomas Garnier , Marc Zyngier , Mark Rutland , Tony Lindgren , Matt Fleming , Dave Martin Date: Sun, 3 Sep 2017 13:07:37 +0100 Message-Id: <20170903120757.14968-10-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170903120757.14968-1-ard.biesheuvel@linaro.org> References: <20170903120757.14968-1-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH v2 09/29] ARM: sleep.S: use PC-relative insn sequence for sleep_save_sp/mpidr_hash X-Virus-Scanned: ClamAV using ClamSMTP Replace the open coded PC relative offset calculations with adr_l and ldr_l invocations. Note that ALT_SMP() expects a single instruction so move the macro invocation after it. Signed-off-by: Ard Biesheuvel Acked-by: Nicolas Pitre --- arch/arm/kernel/sleep.S | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index 0f6c1000582c..f4920b5d0fc4 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -71,8 +71,9 @@ ENTRY(__cpu_suspend) ldr r3, =sleep_save_sp stmfd sp!, {r0, r1} @ save suspend func arg and pointer ldr r3, [r3, #SLEEP_SAVE_SP_VIRT] - ALT_SMP(ldr r0, =mpidr_hash) + ALT_SMP(W(nop)) @ don't use adr_l inside ALT_SMP() ALT_UP_B(1f) + adr_l r0, mpidr_hash /* This ldmia relies on the memory layout of the mpidr_hash struct */ ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts compute_mpidr_hash r0, r6, r7, r8, r2, r1 @@ -137,9 +138,8 @@ ARM_BE8(setend be) @ ensure we are in BE mode mov r1, #0 ALT_SMP(mrc p15, 0, r0, c0, c0, 5) ALT_UP_B(1f) - adr r2, mpidr_hash_ptr - ldr r3, [r2] - add r2, r2, r3 @ r2 = struct mpidr_hash phys address + adr_l r2, mpidr_hash @ r2 = struct mpidr_hash phys address + /* * This ldmia relies on the memory layout of the mpidr_hash * struct mpidr_hash. @@ -147,10 +147,7 @@ ARM_BE8(setend be) @ ensure we are in BE mode ldmia r2, { r3-r6 } @ r3 = mpidr mask (r4,r5,r6) = l[0,1,2] shifts compute_mpidr_hash r1, r4, r5, r6, r0, r3 1: - adr r0, _sleep_save_sp - ldr r2, [r0] - add r0, r0, r2 - ldr r0, [r0, #SLEEP_SAVE_SP_PHYS] + ldr_l r0, sleep_save_sp + SLEEP_SAVE_SP_PHYS ldr r0, [r0, r1, lsl #2] @ load phys pgd, stack, resume fn @@ -164,12 +161,6 @@ ENDPROC(cpu_resume) ENDPROC(cpu_resume_arm) #endif - .align 2 -_sleep_save_sp: - .long sleep_save_sp - . -mpidr_hash_ptr: - .long mpidr_hash - . @ mpidr_hash struct offset - .data .type sleep_save_sp, #object ENTRY(sleep_save_sp)