From patchwork Sun Sep 3 12:07:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9936129 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 29B106037D for ; Sun, 3 Sep 2017 12:10:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1BBF2286A9 for ; Sun, 3 Sep 2017 12:10:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 10974286B3; Sun, 3 Sep 2017 12:10:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 2D5D1286A9 for ; Sun, 3 Sep 2017 12:10:16 +0000 (UTC) Received: (qmail 12053 invoked by uid 550); 3 Sep 2017 12:09:01 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 11920 invoked from network); 3 Sep 2017 12:09:00 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6DMlP6p2IcVDDcSn2jy0crE7sHidF0DAWiWb065R4J4=; b=XaSHyiewcvhcYj6oC8Y+zEyyJzDRGFIWrkPmkyGOYgQIT0OrtugWOvygJ6TJveDJio 7jMAe+RH3uV+BOQdwZpWSflhRTqyBDXx3PI28z26RWnqe2i7Xuz+OeNxMI+A3kt5klxU YCR8hWEVbxanyi1hPYgR41Zn3qpZCAhK6KND0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6DMlP6p2IcVDDcSn2jy0crE7sHidF0DAWiWb065R4J4=; b=e82jsXRK+F/61KmmlRGHQCgHRIky9ZBMMK6jedBzq2FlWatDl8BSRardMGZJTgmdD5 QEeDGJO8pjQrlS7KJl+9KrMneUWzas6EHQgAE/Kfqf4zltHrBwo8lqMGhPr0KqV0J6Gu cosm5pkAef7QHyEpuzmZBSBxwuRb5MigJSP20vWEeqzAaEc3+f+jCth6QAchs1GopKJD T5Ki5VSZiYCRRujNoic9rqaxBSSaUs79DYf3EhwlahC+3ch9Jp0D0PuWZD6E6MWtC0tw ods2g9FBPvpVbC10e+eFCHz1Q8uzM5TWs0uHh3uohUbbMn3sUa0XkUe2N9j7PrXa4iAl P/dw== X-Gm-Message-State: AHPjjUg5bYRJJralZkwLh+9HI8duLUPn0wT8kHfHk8zVl38M1uN4S62j 7OnqUkRObxY4h+Jl X-Google-Smtp-Source: ADKCNb7t0jEt/vW5WFS+vIPzEYNaKxXCLLOcJtNVwzTwNseSLnQJ0Qha0hltMyukhhHEtJiXESzVXw== X-Received: by 10.28.216.211 with SMTP id p202mr2467095wmg.100.1504440529065; Sun, 03 Sep 2017 05:08:49 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com Cc: Ard Biesheuvel , Arnd Bergmann , Nicolas Pitre , Russell King , Kees Cook , Thomas Garnier , Marc Zyngier , Mark Rutland , Tony Lindgren , Matt Fleming , Dave Martin Date: Sun, 3 Sep 2017 13:07:38 +0100 Message-Id: <20170903120757.14968-11-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170903120757.14968-1-ard.biesheuvel@linaro.org> References: <20170903120757.14968-1-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH v2 10/29] ARM: head.S: use PC-relative insn sequences for __fixup_pv_table X-Virus-Scanned: ClamAV using ClamSMTP Replace the open coded PC relative offset calculations with adr_l and mov_l invocations. This ensures these quantities are invariant under runtime relocation. Cc: Russell King Signed-off-by: Ard Biesheuvel Acked-by: Nicolas Pitre --- arch/arm/kernel/head.S | 27 ++++++-------------- 1 file changed, 8 insertions(+), 19 deletions(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index db6b823f20a4..f607e290ef4b 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -578,14 +578,11 @@ ENDPROC(fixup_smp) */ __HEAD __fixup_pv_table: - adr r0, 1f - ldmia r0, {r3-r7} + adr_l r6, __pv_phys_pfn_offset + adr_l r7, __pv_offset @ __pa(__pv_offset) + mov_l r3, __pv_offset @ __va(__pv_offset) mvn ip, #0 - subs r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET - add r4, r4, r3 @ adjust table start address - add r5, r5, r3 @ adjust table end address - add r6, r6, r3 @ adjust __pv_phys_pfn_offset address - add r7, r7, r3 @ adjust __pv_offset address + subs r3, r7, r3 @ PHYS_OFFSET - PAGE_OFFSET mov r0, r8, lsr #PAGE_SHIFT @ convert to PFN str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits @@ -594,20 +591,15 @@ __fixup_pv_table: THUMB( it ne @ cross section branch ) bne __error str r3, [r7, #LOW_OFFSET] @ save to __pv_offset low bits + adr_l r4, __pv_table_begin + adr_l r5, __pv_table_end b __fixup_a_pv_table ENDPROC(__fixup_pv_table) - - .align -1: .long . - .long __pv_table_begin - .long __pv_table_end -2: .long __pv_phys_pfn_offset - .long __pv_offset + .ltorg .text __fixup_a_pv_table: - adr r0, 3f - ldr r6, [r0] + mov_l r6, __pv_offset add r6, r6, r3 ldr r0, [r6, #HIGH_OFFSET] @ pv_offset high word ldr r6, [r6, #LOW_OFFSET] @ pv_offset low word @@ -676,9 +668,6 @@ ARM_BE8(rev16 ip, ip) #endif ENDPROC(__fixup_a_pv_table) - .align -3: .long __pv_offset - ENTRY(fixup_pv_table) stmfd sp!, {r4 - r7, lr} mov r3, #0 @ no offset