From patchwork Sun Sep 3 12:07:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9936157 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 47FDD6037D for ; Sun, 3 Sep 2017 12:12:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3A0FD286A9 for ; Sun, 3 Sep 2017 12:12:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2EDB3286B3; Sun, 3 Sep 2017 12:12:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 31C8F286A9 for ; Sun, 3 Sep 2017 12:12:16 +0000 (UTC) Received: (qmail 17665 invoked by uid 550); 3 Sep 2017 12:09:34 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 17500 invoked from network); 3 Sep 2017 12:09:32 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RlvjCrNlhOGjPHcrdrLCiYJEwgq2Z4Lxt0AS7Ll2Acg=; b=G07hhF7btuHK7erkUCkYw5TjacgySp/dVtERhS7PExjxq6ZxEIQ69nWVct1W7eEotN ljy8ps0URuBsb6nz7AmZbOkEi//No5P1JwmCPN7QEnW9OUtV6qtUKqCJBOqWGppnIQwE oQ7yGSlc+RKepO6ywFH1P8EeM7g7gdGjX5tGk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RlvjCrNlhOGjPHcrdrLCiYJEwgq2Z4Lxt0AS7Ll2Acg=; b=CznXeTUv2CWcpwjCH8aFDdIlelBYvPDt5KCMn3S/lJi/xgLI3YkYts+ODDzdCwlr6X XrLhS8QXgJjW7L1j01cLsPqPC49Fx3/BVd02rZMUPXEA6/rKCfu4D/smcod712tAdhhE j6d45vPNd/gyEKFa/S+s/9yqIATIfIeV8iKlxHGiBxZBGZjBJKZDqK2otydQo8Ta/OXd J6oNl4JfAk+MoqAXeR4lJug/fhGZXQP5sEaew5/15xuVprQC3Uz84Qb4z+UoPM0XimqS kpmUYmtr6THlnx4xl2R0i5HQ/wKdyO6gxpDLCyDUuzL3E2Sp2p/fPQ1uE6o+d10VWD0q yh4w== X-Gm-Message-State: AHPjjUjna/MRyuNyeAR5I5dPpQrZr4oZH9jFQNWFzdDLIAmXLnVCIscU tEbR+MWr+AUFywRU X-Google-Smtp-Source: ADKCNb7zlEqA/QsZx1Erngg60ZZkWqJqMYMcXV/CrM8pITuxoROuL7ZvKyEoYxTZBM595+oMHnESFQ== X-Received: by 10.28.109.220 with SMTP id b89mr2627675wmi.106.1504440561301; Sun, 03 Sep 2017 05:09:21 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com Cc: Ard Biesheuvel , Arnd Bergmann , Nicolas Pitre , Russell King , Kees Cook , Thomas Garnier , Marc Zyngier , Mark Rutland , Tony Lindgren , Matt Fleming , Dave Martin Date: Sun, 3 Sep 2017 13:07:48 +0100 Message-Id: <20170903120757.14968-21-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170903120757.14968-1-ard.biesheuvel@linaro.org> References: <20170903120757.14968-1-ard.biesheuvel@linaro.org> Subject: [kernel-hardening] [PATCH v2 20/29] ARM: kernel: use PC-relative symbol references in MMU switch code X-Virus-Scanned: ClamAV using ClamSMTP To prepare for adding support for KASLR, which relocates all absolute symbol references at runtime after the caches have been enabled, update the MMU switch code to avoid using absolute symbol references where possible. This ensures these quantities are invariant under runtime relocation. Cc: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/head-common.S | 39 ++++++++------------ 1 file changed, 15 insertions(+), 24 deletions(-) diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S index 06035488130c..b74477507a12 100644 --- a/arch/arm/kernel/head-common.S +++ b/arch/arm/kernel/head-common.S @@ -79,9 +79,10 @@ ENDPROC(__vet_atags) */ __INIT __mmap_switched: - adr r3, __mmap_switched_data - - ldmia r3!, {r4, r5, r6, r7} + adr_l r4, __data_loc + adr_l r5, _sdata + adr_l r6, __bss_start + adr_l r7, _end cmp r4, r5 @ Copy data segment if needed 1: cmpne r5, r6 ldrne fp, [r4], #4 @@ -93,9 +94,17 @@ __mmap_switched: strcc fp, [r6],#4 bcc 1b - ARM( ldmia r3, {r4, r5, r6, r7, sp}) - THUMB( ldmia r3, {r4, r5, r6, r7} ) - THUMB( ldr sp, [r3, #16] ) + adr_l r3, init_thread_union + THREAD_START_SP + mov sp, r3 + adr_l r4, processor_id + adr_l r5, __machine_arch_type + adr_l r6, __atags_pointer +#ifdef CONFIG_CPU_CP15 + adr_l r7, cr_alignment +#else + mov r7, #0 +#endif + str r9, [r4] @ Save processor ID str r1, [r5] @ Save machine type str r2, [r6] @ Save atags pointer @@ -104,24 +113,6 @@ __mmap_switched: b start_kernel ENDPROC(__mmap_switched) - .align 2 - .type __mmap_switched_data, %object -__mmap_switched_data: - .long __data_loc @ r4 - .long _sdata @ r5 - .long __bss_start @ r6 - .long _end @ r7 - .long processor_id @ r4 - .long __machine_arch_type @ r5 - .long __atags_pointer @ r6 -#ifdef CONFIG_CPU_CP15 - .long cr_alignment @ r7 -#else - .long 0 @ r7 -#endif - .long init_thread_union + THREAD_START_SP @ sp - .size __mmap_switched_data, . - __mmap_switched_data - /* * This provides a C-API version of __lookup_processor_type */