From patchwork Wed Oct 11 20:30:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 10000609 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 835AF6037F for ; Wed, 11 Oct 2017 20:35:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 779C428B66 for ; Wed, 11 Oct 2017 20:35:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6BA4328B71; Wed, 11 Oct 2017 20:35:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 53AD128B66 for ; Wed, 11 Oct 2017 20:35:43 +0000 (UTC) Received: (qmail 15850 invoked by uid 550); 11 Oct 2017 20:31:53 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 15534 invoked from network); 11 Oct 2017 20:31:43 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rTRF5EsAKsx8IX6+UZpMdLlToReJc/ZfQ0FNzhsNUoI=; b=IZNCbf4+GnXXDByQN9i77V2MEnW+FhUqwFEmRXzvNyAQ81GJat5odmHkQdzam6+uS4 ObNa6KqEKRAXDeCjx9h1wG5uhoCdv0j0O7FsZathvV3ZPrGaCFwm6U122r8jK0YD+Z+R rBasUqYK8koURidKWw6zFhGhk8eZ+8usOz+Dghk2gQOhb21KwN/FHyCWjZp3ueURBe4E rtf0oAt5jSY/DDRqVJ+QPM/y+sI0VS6J95Ppb2J+iv292jHekeVmkcCDoPAhov+w4ufa keWW5OQcD6g49fJPs6NHkOL/Bd2dijqk1kbKscnjmiM2U4FJtV9LewNenM5Z/vNU7QPO /nSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rTRF5EsAKsx8IX6+UZpMdLlToReJc/ZfQ0FNzhsNUoI=; b=AcmyE3I+sTZY9Grg8dGsRKXaYgYbdgsTu4jnzVvyNRo/ZCQv8K1AyMWeF5V8R4PDlN 2D+KDiMQkTW2aTIPd4sGXN0iIu7gXwaxN0ZTlBrVOKICieoLOVhk3S2o+PfV93/qNbw1 hZhUp6MnvaMKyXw0iu8Qeh452yoYGuO4f0Lqsvfi4GimDV7GhLt6gPo8kL3U6Gcz/X75 h/hW0BB5ZNL/H6qs1hRdf7XMU7MvDtFXXUdJlPJ3SQWZs5pB3mEvQ7qveZ2sRk69/xjH N7K8QqSDFM6RNlFvzSAaW55IQiA4yQYlTOYNlReWVzKy0Y03kNwCs4uun9E/1dK7/PWX RP0Q== X-Gm-Message-State: AMCzsaVGRcgaLuBkTFCWGcxr6z5F9c0HtbPhuao/IxVpxdyMPc1F2T1F 3hTb0zoCsvb8wtpErJ8kUisy+Q== X-Google-Smtp-Source: AOwi7QBgEzzCk5IjEBF+qTJfu5tvE9fFxcFdp8AyfbevarLDMso6wnrXYG9i5rcrNJOfPJIesyWucw== X-Received: by 10.98.62.195 with SMTP id y64mr200540pfj.140.1507753890883; Wed, 11 Oct 2017 13:31:30 -0700 (PDT) From: Thomas Garnier To: Herbert Xu , "David S . Miller" , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Arnd Bergmann , Thomas Garnier , Kees Cook , Andrey Ryabinin , Matthias Kaehlcke , Tom Lendacky , Andy Lutomirski , "Kirill A . Shutemov" , Borislav Petkov , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Juergen Gross , Chris Wright , Alok Kataria , Rusty Russell , Tejun Heo , Christoph Lameter , Boris Ostrovsky , Paul Gortmaker , Andrew Morton , Alexey Dobriyan , "Paul E . McKenney" , Nicolas Pitre , Borislav Petkov , "Luis R . Rodriguez" , Greg Kroah-Hartman , Christopher Li , Steven Rostedt , Jason Baron , Mika Westerberg , Dou Liyang , "Rafael J . Wysocki" , Lukas Wunner , Masahiro Yamada , Alexei Starovoitov , Daniel Borkmann , Markus Trippelsdorf , Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Joerg Roedel , Rik van Riel , David Howells , Ard Biesheuvel , Waiman Long , Kyle Huey , Jonathan Corbet , Michal Hocko , Peter Foley , Paul Bolle , Jiri Kosina , "H . J . Lu" , Rob Landley , Baoquan He , =?UTF-8?q?Jan=20H=20=2E=20Sch=C3=B6nherr?= , Daniel Micay Cc: x86@kernel.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, virtualization@lists.linux-foundation.org, xen-devel@lists.xenproject.org, linux-arch@vger.kernel.org, linux-sparse@vger.kernel.org, kvm@vger.kernel.org, linux-doc@vger.kernel.org, kernel-hardening@lists.openwall.com Date: Wed, 11 Oct 2017 13:30:17 -0700 Message-Id: <20171011203027.11248-18-thgarnie@google.com> X-Mailer: git-send-email 2.15.0.rc0.271.g36b669edcc-goog In-Reply-To: <20171011203027.11248-1-thgarnie@google.com> References: <20171011203027.11248-1-thgarnie@google.com> Subject: [kernel-hardening] [PATCH v1 17/27] xen: Adapt assembly for PIE support X-Virus-Scanned: ClamAV using ClamSMTP Change the assembly code to use the new _ASM_GET_PTR macro which get a symbol reference while being PIE compatible. Adapt the relocation tool to ignore 32-bit Xen code. Position Independent Executable (PIE) support will allow to extended the KASLR randomization range below the -2G memory limit. Signed-off-by: Thomas Garnier --- arch/x86/tools/relocs.c | 16 +++++++++++++++- arch/x86/xen/xen-head.S | 9 +++++---- arch/x86/xen/xen-pvh.S | 13 +++++++++---- 3 files changed, 29 insertions(+), 9 deletions(-) diff --git a/arch/x86/tools/relocs.c b/arch/x86/tools/relocs.c index 5d3eb2760198..bc032ad88b22 100644 --- a/arch/x86/tools/relocs.c +++ b/arch/x86/tools/relocs.c @@ -831,6 +831,16 @@ static int is_percpu_sym(ElfW(Sym) *sym, const char *symname) strncmp(symname, "init_per_cpu_", 13); } +/* + * Check if the 32-bit relocation is within the xenpvh 32-bit code. + * If so, ignores it. + */ +static int is_in_xenpvh_assembly(ElfW(Addr) offset) +{ + ElfW(Sym) *sym = sym_lookup("pvh_start_xen"); + return sym && (offset >= sym->st_value) && + (offset < (sym->st_value + sym->st_size)); +} static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym, const char *symname) @@ -892,8 +902,12 @@ static int do_reloc64(struct section *sec, Elf_Rel *rel, ElfW(Sym) *sym, * the relocations are processed. * Make sure that the offset will fit. */ - if (r_type != R_X86_64_64 && (int32_t)offset != (int64_t)offset) + if (r_type != R_X86_64_64 && + (int32_t)offset != (int64_t)offset) { + if (is_in_xenpvh_assembly(offset)) + break; die("Relocation offset doesn't fit in 32 bits\n"); + } if (r_type == R_X86_64_64) add_reloc(&relocs64, offset); diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S index 124941d09b2b..e5b7b9566191 100644 --- a/arch/x86/xen/xen-head.S +++ b/arch/x86/xen/xen-head.S @@ -25,14 +25,15 @@ ENTRY(startup_xen) /* Clear .bss */ xor %eax,%eax - mov $__bss_start, %_ASM_DI - mov $__bss_stop, %_ASM_CX + _ASM_GET_PTR(__bss_start, %_ASM_DI) + _ASM_GET_PTR(__bss_stop, %_ASM_CX) sub %_ASM_DI, %_ASM_CX shr $__ASM_SEL(2, 3), %_ASM_CX rep __ASM_SIZE(stos) - mov %_ASM_SI, xen_start_info - mov $init_thread_union+THREAD_SIZE, %_ASM_SP + _ASM_GET_PTR(xen_start_info, %_ASM_AX) + mov %_ASM_SI, (%_ASM_AX) + _ASM_GET_PTR(init_thread_union+THREAD_SIZE, %_ASM_SP) jmp xen_start_kernel END(startup_xen) diff --git a/arch/x86/xen/xen-pvh.S b/arch/x86/xen/xen-pvh.S index e1a5fbeae08d..43e234c7c2de 100644 --- a/arch/x86/xen/xen-pvh.S +++ b/arch/x86/xen/xen-pvh.S @@ -101,8 +101,8 @@ ENTRY(pvh_start_xen) call xen_prepare_pvh /* startup_64 expects boot_params in %rsi. */ - mov $_pa(pvh_bootparams), %rsi - mov $_pa(startup_64), %rax + movabs $_pa(pvh_bootparams), %rsi + movabs $_pa(startup_64), %rax jmp *%rax #else /* CONFIG_X86_64 */ @@ -137,10 +137,15 @@ END(pvh_start_xen) .section ".init.data","aw" .balign 8 + /* + * Use a quad for _pa(gdt_start) because PIE does not understand a + * long is enough. The resulting value will still be in the lower long + * part. + */ gdt: .word gdt_end - gdt_start - .long _pa(gdt_start) - .word 0 + .quad _pa(gdt_start) + .balign 8 gdt_start: .quad 0x0000000000000000 /* NULL descriptor */ .quad 0x0000000000000000 /* reserved */