From patchwork Wed May 23 19:54:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 10422269 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AE4DA6032A for ; Wed, 23 May 2018 19:58:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E793291DA for ; Wed, 23 May 2018 19:58:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9108C291DB; Wed, 23 May 2018 19:58:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id A991E291DD for ; Wed, 23 May 2018 19:57:57 +0000 (UTC) Received: (qmail 23758 invoked by uid 550); 23 May 2018 19:55:42 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 23589 invoked from network); 23 May 2018 19:55:36 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ivDwinj5B2FTmi26shpF+ta6y2K07gNKYis6IAh0yU8=; b=GCWBPy6uQb0GFS6p3MIfYsUeE6qwsaV04dC7CKrviH5qrfuer6nOsF5e5+r6T/myVN 61ArjVeq71NXuYiFzNHuSLlBRtAbzj+dCUaswI/rVPjGJ1bVDeNv7QSB3MWRnjwfu9KC I7j8FevwL2nnqovNq/+TiqHShvw8kVWSw9qqhSedGei4GncyD40XxkLdRFZC9uKEt04B jlko3V5yUlt5edW+04qw3hwAdi1OtFFh9VIFig9Ljdwr54QbzeyH5ZHIZCl/HT+EMCK7 1gFxyOma+jem92YXEKi3MqJaJZ7TRqncWzDxeaNzVAuLrwO9Ygwnod/AADoCp/tH5Miv kqZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ivDwinj5B2FTmi26shpF+ta6y2K07gNKYis6IAh0yU8=; b=qfOVxxCZGlz2yxrsEAxA0OJ5cIcK3lFtHBgLD624mtIjQsyL8wG3N59B3K9wKocZh/ Q9KGyUqQcYkvnBOxzyqSsxH+H3vMTTvns4Fp6GPuHsz7SA71EhIPu8L96JJC5SC+lfyy TYlpODqDrrV9zQ58aYBCZmKGrQD6iDX+BGD0LJOJNonRpMiC0P3OeCGJqwkVc6F8f4A8 d8gJDQ/ranRvn5cQPBTc2T+bO8uCZj7VBUGavCa7us+aeuY/0qdDpWFBvax9GGozLnVm 7IwwrqBkdVYsvdbH3DFIGpou9TM7MVC7Z69+fNItfAijx9x4JPpuImKS7FK1yK4OrAuM 6Fpg== X-Gm-Message-State: ALKqPwc4PG/aHt1e+OLtKZMFOIKI1oZEBj0O/V8nvRuUImSUKjIjgA05 xffy+QT1V1WT4j9h6QnbH0Wzhw== X-Google-Smtp-Source: AB8JxZrRvuMrZ8Az4pacYoGrx7fm4EKAgTeX5baLw5gzL6xIqENZlY7xq8PRal4ZkltGKQwbgar/zQ== X-Received: by 2002:a65:5a0d:: with SMTP id y13-v6mr3421805pgs.15.1527105323358; Wed, 23 May 2018 12:55:23 -0700 (PDT) From: Thomas Garnier To: Herbert Xu , "David S . Miller" , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Greg Kroah-Hartman , Thomas Garnier , Philippe Ombredanne , Kate Stewart , Arnaldo Carvalho de Melo , Yonghong Song , Andrey Ryabinin , Kees Cook , Tom Lendacky , "Kirill A . Shutemov" , Andy Lutomirski , Dominik Brodowski , Borislav Petkov , Borislav Petkov , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Juergen Gross , Alok Kataria , Steven Rostedt , Jan Kiszka , Tejun Heo , Christoph Lameter , Dennis Zhou , Boris Ostrovsky , Alexey Dobriyan , Masami Hiramatsu , Cao jin , Francis Deslauriers , "Paul E . McKenney" , Nicolas Pitre , Andrew Morton , Randy Dunlap , "Luis R . Rodriguez" , Arnd Bergmann , Christopher Li , Jason Baron , Mika Westerberg , Lukas Wunner , Dou Liyang , Sergey Senozhatsky , Petr Mladek , Masahiro Yamada , Ingo Molnar , Nicholas Piggin , "H . J . Lu" , Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Joerg Roedel , David Woodhouse , Dave Hansen , Rik van Riel , Jia Zhang , Ricardo Neri , Jonathan Corbet , Jan Beulich , Matthias Kaehlcke , Baoquan He , =?UTF-8?q?Jan=20H=20=2E=20Sch=C3=B6nherr?= , Daniel Micay Cc: x86@kernel.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, virtualization@lists.linux-foundation.org, xen-devel@lists.xenproject.org, linux-arch@vger.kernel.org, linux-sparse@vger.kernel.org, kvm@vger.kernel.org, linux-doc@vger.kernel.org, kernel-hardening@lists.openwall.com Subject: [PATCH v3 10/27] x86/boot/64: Adapt assembly for PIE support Date: Wed, 23 May 2018 12:54:04 -0700 Message-Id: <20180523195421.180248-11-thgarnie@google.com> X-Mailer: git-send-email 2.17.0.441.gb46fe60e1d-goog In-Reply-To: <20180523195421.180248-1-thgarnie@google.com> References: <20180523195421.180248-1-thgarnie@google.com> X-Virus-Scanned: ClamAV using ClamSMTP Change the assembly code to use only relative references of symbols for the kernel to be PIE compatible. Early at boot, the kernel is mapped at a temporary address while preparing the page table. To know the changes needed for the page table with KASLR, the boot code calculate the difference between the expected address of the kernel and the one chosen by KASLR. It does not work with PIE because all symbols in code are relatives. Instead of getting the future relocated virtual address, you will get the current temporary mapping. The solution is using global variables that will be relocated as expected. Position Independent Executable (PIE) support will allow to extended the KASLR randomization range below the -2G memory limit. Signed-off-by: Thomas Garnier --- arch/x86/kernel/head_64.S | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 8344dd2f310a..7c8f7ce93b9e 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -89,8 +89,9 @@ startup_64: popq %rsi /* Form the CR3 value being sure to include the CR3 modifier */ - addq $(early_top_pgt - __START_KERNEL_map), %rax + addq _early_top_pgt_offset(%rip), %rax jmp 1f + ENTRY(secondary_startup_64) UNWIND_HINT_EMPTY /* @@ -119,7 +120,7 @@ ENTRY(secondary_startup_64) popq %rsi /* Form the CR3 value being sure to include the CR3 modifier */ - addq $(init_top_pgt - __START_KERNEL_map), %rax + addq _init_top_offset(%rip), %rax 1: /* Enable PAE mode, PGE and LA57 */ @@ -137,7 +138,7 @@ ENTRY(secondary_startup_64) movq %rax, %cr3 /* Ensure I am executing from virtual addresses */ - movq $1f, %rax + movabs $1f, %rax ANNOTATE_RETPOLINE_SAFE jmp *%rax 1: @@ -234,11 +235,12 @@ ENTRY(secondary_startup_64) * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, * address given in m16:64. */ - pushq $.Lafter_lret # put return address on stack for unwinder + leaq .Lafter_lret(%rip), %rax + pushq %rax # put return address on stack for unwinder xorq %rbp, %rbp # clear frame pointer - movq initial_code(%rip), %rax + leaq initial_code(%rip), %rax pushq $__KERNEL_CS # set correct cs - pushq %rax # target address in negative space + pushq (%rax) # target address in negative space lretq .Lafter_lret: END(secondary_startup_64) @@ -342,6 +344,18 @@ END(early_idt_handler_common) GLOBAL(early_recursion_flag) .long 0 + /* + * Position Independent Code takes only relative references in code + * meaning a global variable address is relative to RIP and not its + * future virtual address. Global variables can be used instead as they + * are still relocated on the expected kernel mapping address. + */ + .align 8 +_early_top_pgt_offset: + .quad early_top_pgt - __START_KERNEL_map +_init_top_offset: + .quad init_top_pgt - __START_KERNEL_map + #define NEXT_PAGE(name) \ .balign PAGE_SIZE; \ GLOBAL(name)