From patchwork Tue May 29 22:15:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 10437285 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D58B7601E9 for ; Tue, 29 May 2018 22:19:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BF21B2890F for ; Tue, 29 May 2018 22:19:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B3E742891F; Tue, 29 May 2018 22:19:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id B8EBC2890F for ; Tue, 29 May 2018 22:19:37 +0000 (UTC) Received: (qmail 17869 invoked by uid 550); 29 May 2018 22:17:21 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 17553 invoked from network); 29 May 2018 22:17:13 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CKC15jwBT/U9s+wbuyae2N59cLrQZwUd8Hb/4FWcbbQ=; b=qik5OpBFE/0ilcIOOsn5ExmR0xlvE9h7EnuwpvivhW+4egEPbg4pzUs8Ycp6cdTGP5 /hRm1hT+BHQoEaWdXW3cBHazBvAjXq0AQl1lMreElTN6HjCql3pbVxpFs8XVi8p4vVve AimrQ42omzYPxZlROn3GvstpYHQxlUs8unIYJJKTGXPTRI9HKl6H+uYVrlNrPwlCzKZE nJGheUmcv562veG4FqYwmG9BLkZeUpbEteLBQcy9RGzAF52a6LkuBTjnZ9M2kjrGwCnt GaJFqBM4cc0ZOEHFEQWhRUx7XoDRYHyLCy+L6pUDN39aoKsGXHLBzuvdaofNegiu+Rt7 CZtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CKC15jwBT/U9s+wbuyae2N59cLrQZwUd8Hb/4FWcbbQ=; b=KhZwB2FvX0QHPr5hshchqLpk8V37IlPnnCfWKMHOOYkWv4Didc1qqPph5TBlH9duKa CeaNEUKNbczH03711g7SIKNt/hmjbhzBVDeVveeGnS6QsJ4/dlG48gJbmleK3IcmxwLa JKBvkICzXI4Yo8QQEoCBBHSJQF6sellnQMNP/TM+dLr5yUOHdQu223N5HGxD6zJkxlLj tC1T1BQojCgFro6+KkiSXmcBJlyDwFZYcLpom80pAJZCxr0A9pC0f+aeSfsZpAsWBnMr ygj6UlDFhE+Xc9Z8JQtHHgrOoVQkKtRcOpUOTYe5IWBOhb60Y2HDx5PatlxXl80Jv5j5 8PBw== X-Gm-Message-State: ALKqPwehew0QkESHLIUPvNUmRMe0iX0QyysBemxa/Fiebwb4Ve5za0+y EziZTcOdU4X6C3efM1wQevVZL8kznys= X-Google-Smtp-Source: ADUXVKLhSbAJvU/RWf+PLsjo3nJnhd7JZD+BQ7LBCGNyN/4ghfMU1MN3mzsiV06/KBz/jqOriMLdew== X-Received: by 2002:a17:902:7105:: with SMTP id a5-v6mr219077pll.171.1527632221265; Tue, 29 May 2018 15:17:01 -0700 (PDT) From: Thomas Garnier To: kernel-hardening@lists.openwall.com Cc: Thomas Garnier , "Rafael J. Wysocki" , Len Brown , Pavel Machek , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 09/27] x86/acpi: Adapt assembly for PIE support Date: Tue, 29 May 2018 15:15:10 -0700 Message-Id: <20180529221625.33541-10-thgarnie@google.com> X-Mailer: git-send-email 2.17.0.921.gf22659ad46-goog In-Reply-To: <20180529221625.33541-1-thgarnie@google.com> References: <20180529221625.33541-1-thgarnie@google.com> X-Virus-Scanned: ClamAV using ClamSMTP Change the assembly code to use only relative references of symbols for the kernel to be PIE compatible. Position Independent Executable (PIE) support will allow to extend the KASLR randomization range 0xffffffff80000000. Signed-off-by: Thomas Garnier Acked-by: Pavel Machek Acked-by: Rafael J. Wysocki --- arch/x86/kernel/acpi/wakeup_64.S | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S index 50b8ed0317a3..472659c0f811 100644 --- a/arch/x86/kernel/acpi/wakeup_64.S +++ b/arch/x86/kernel/acpi/wakeup_64.S @@ -14,7 +14,7 @@ * Hooray, we are in Long 64-bit mode (but still running in low memory) */ ENTRY(wakeup_long64) - movq saved_magic, %rax + movq saved_magic(%rip), %rax movq $0x123456789abcdef0, %rdx cmpq %rdx, %rax jne bogus_64_magic @@ -25,14 +25,14 @@ ENTRY(wakeup_long64) movw %ax, %es movw %ax, %fs movw %ax, %gs - movq saved_rsp, %rsp + movq saved_rsp(%rip), %rsp - movq saved_rbx, %rbx - movq saved_rdi, %rdi - movq saved_rsi, %rsi - movq saved_rbp, %rbp + movq saved_rbx(%rip), %rbx + movq saved_rdi(%rip), %rdi + movq saved_rsi(%rip), %rsi + movq saved_rbp(%rip), %rbp - movq saved_rip, %rax + movq saved_rip(%rip), %rax jmp *%rax ENDPROC(wakeup_long64) @@ -45,7 +45,7 @@ ENTRY(do_suspend_lowlevel) xorl %eax, %eax call save_processor_state - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -64,13 +64,14 @@ ENTRY(do_suspend_lowlevel) pushfq popq pt_regs_flags(%rax) - movq $.Lresume_point, saved_rip(%rip) + leaq .Lresume_point(%rip), %rax + movq %rax, saved_rip(%rip) - movq %rsp, saved_rsp - movq %rbp, saved_rbp - movq %rbx, saved_rbx - movq %rdi, saved_rdi - movq %rsi, saved_rsi + movq %rsp, saved_rsp(%rip) + movq %rbp, saved_rbp(%rip) + movq %rbx, saved_rbx(%rip) + movq %rdi, saved_rdi(%rip) + movq %rsi, saved_rsi(%rip) addq $8, %rsp movl $3, %edi @@ -82,7 +83,7 @@ ENTRY(do_suspend_lowlevel) .align 4 .Lresume_point: /* We don't restore %rax, it must be 0 anyway */ - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq saved_context_cr4(%rax), %rbx movq %rbx, %cr4 movq saved_context_cr3(%rax), %rbx