From patchwork Mon Jun 25 22:39:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 10488275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 46046601A0 for ; Tue, 26 Jun 2018 08:42:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 30261287E8 for ; Tue, 26 Jun 2018 08:42:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D917F289CB; Tue, 26 Jun 2018 08:42:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 9E48C28A49 for ; Tue, 26 Jun 2018 08:41:52 +0000 (UTC) Received: (qmail 26067 invoked by uid 550); 26 Jun 2018 08:39:22 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Delivered-To: moderator for kernel-hardening@lists.openwall.com Received: (qmail 11463 invoked from network); 25 Jun 2018 22:41:42 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:date:in-reply-to:message-id:references:subject:from:to :cc; bh=0C+LMsVRbCpktsH0OP9a+VzlFglDWVu/5NfSR7InwoA=; b=NJmelMs3JGtjo0UodVP9ZvMLU2naSvRRF6ul/wNI+nvw1kYD4d/FeJOkctM1L+ujmi nNdwDfA2g1lvMv5rhiua2hAIu01gPwi594rBxnQFldPmIiTYb8ZtP5tCHIcJNTM7a/gk xWqhO9NHeoMbTX1210jR6embXbfGT9aIseMhanbCJWiGEdq37FxHM+BULPGuyzfb/1vc xq6aQdpxS/dfE6TOtvnPhOG3wOvkg+Un1Y5V/I2w6BkatD48/M2EXKo7uSVWUhB8lnEX 0lDwyyjuiI9U1PBfbwK8tydil2pVenBkzUN8c9RHwZRqLtLLnjWrARpjkobbxGpu2j9e yJxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:date:in-reply-to:message-id :references:subject:from:to:cc; bh=0C+LMsVRbCpktsH0OP9a+VzlFglDWVu/5NfSR7InwoA=; b=VinXk5neb+yombHWPOaXNl3ojpBDOptbn3bB/pGphTGKKHh0EI8sPafGqO/bgR1wcQ s10HfSDhxg5+AlFGjtHyV7jB9Py3XOmrF5gGQtM+v7c0pmzrVYcWrCCy3NLPqCnQ4XhP frEhQp5f+iyNhUgm8zjNLwr/dlvRnSNY+LfhGUezq0lQxwZrcQEj1Nm/QvdRivpOae8f WV1+nz7UrCDd5fbDnKHKEk8cAhsaERmuPBlo9YvRql6eb/8/N+tSpOIx4EV4NCw+yJBr g7OEjYBjbqC0YNWZ0cHZQiJf6hHNy/f6QSHDWGmUwoONJwIaZsrm5QrgnzQMfp0Jh4cP +K+Q== X-Gm-Message-State: APt69E2CTm87bUwUeldCcsSggsuHFb/Ju+UbBnrZiJT+eVz5xT2Ulpys /5tFhNXj9o5CjKm069rpxHY7GaeYxZFcc7Xz/9rpUMe51zIgP84LZ4W0aq4scV/o6PTCw6E5g7g 8FugXCvI3tuu1VBWEkTn+Qfmj3N6QCifuQLtQbO4Yii6gV0IN54KWu8kJdZ54fCKsPATTd/0DgS PLm85M1lom X-Google-Smtp-Source: ADUXVKIqVXM+wU3CsSYuZh3Q3Rse4uFmsl2JSdtyT/nKDKD1dMt/UNALHxq+X17U14i7wnlfDhbXw3/LXjBKsQ== MIME-Version: 1.0 X-Received: by 2002:a25:9d8b:: with SMTP id v11-v6mr3853301ybp.51.1529966490949; Mon, 25 Jun 2018 15:41:30 -0700 (PDT) Date: Mon, 25 Jun 2018 15:39:00 -0700 In-Reply-To: <20180625224014.134829-1-thgarnie@google.com> Message-Id: <20180625224014.134829-13-thgarnie@google.com> References: <20180625224014.134829-1-thgarnie@google.com> X-Mailer: git-send-email 2.18.0.rc2.346.g013aa6912e-goog Subject: [PATCH v5 12/27] x86/paravirt: Adapt assembly for PIE support From: Thomas Garnier To: kernel-hardening@lists.openwall.com Cc: Thomas Garnier , Juergen Gross , Alok Kataria , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, virtualization@lists.linux-foundation.org, linux-kernel@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP if PIE is enabled, switch the paravirt assembly constraints to be compatible. The %c/i constrains generate smaller code so is kept by default. Position Independent Executable (PIE) support will allow to extend the KASLR randomization range 0xffffffff80000000. Signed-off-by: Thomas Garnier --- arch/x86/include/asm/paravirt_types.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h index 180bc0bff0fb..140747a98d94 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -337,9 +337,17 @@ extern struct pv_lock_ops pv_lock_ops; #define PARAVIRT_PATCH(x) \ (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) +#ifdef CONFIG_X86_PIE +#define paravirt_opptr_call "a" +#define paravirt_opptr_type "p" +#else +#define paravirt_opptr_call "c" +#define paravirt_opptr_type "i" +#endif + #define paravirt_type(op) \ [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ - [paravirt_opptr] "i" (&(op)) + [paravirt_opptr] paravirt_opptr_type (&(op)) #define paravirt_clobber(clobber) \ [paravirt_clobber] "i" (clobber) @@ -395,7 +403,7 @@ int paravirt_disable_iospace(void); */ #define PARAVIRT_CALL \ ANNOTATE_RETPOLINE_SAFE \ - "call *%c[paravirt_opptr];" + "call *%" paravirt_opptr_call "[paravirt_opptr];" /* * These macros are intended to wrap calls through one of the paravirt