From patchwork Thu Jan 31 19:24:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 10791327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A05F91390 for ; Thu, 31 Jan 2019 19:42:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94E2A31524 for ; Thu, 31 Jan 2019 19:42:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8699F31545; Thu, 31 Jan 2019 19:42:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id C44F931524 for ; Thu, 31 Jan 2019 19:42:35 +0000 (UTC) Received: (qmail 32767 invoked by uid 550); 31 Jan 2019 19:42:29 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Delivered-To: moderator for kernel-hardening@lists.openwall.com Received: (qmail 18409 invoked from network); 31 Jan 2019 19:28:30 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=x+mtJttdkpbHkKwJD9Bx7fRr1xachAxsiCzjUbdFk/A=; b=P9dwYN1MNLKJsS23FZ1poGTZ7I7Oi+vOqxpaisxacaSdT2zvJrAu1UUiFqN1jUSD2a FLs6DqoUS6cCfPSIWUDgxOZiizDJh9zBHeN8IP95pYoCebiXgsthiatwDhOHOS0Q/7ZO m1a8oiJBXQEyGvDnSCJW1Wd7SWSI/78Ow7RuY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=x+mtJttdkpbHkKwJD9Bx7fRr1xachAxsiCzjUbdFk/A=; b=FPvGrWgJDoRfkG7nKiK73EzrrsZmrIiPDREg7hoa6nf1EF0X/li97frRjMWiwTJ2l2 cmttSfbJMgWVk91aVQN+EghvHvBRISsiUrkjVazy/oiktwLNDndD6A4YHO9icXHLzYzF EM35iIVCfGDKRpXCxSBpOJoOgpi4KF+E+AD43jfTzkHHhtr/LcscDfs022k/wbPJc4iH GM0jqmGV+tkF3B6jfi24vz/tsqx9TjRgtg5R4x0ef3xpjtUBcTKn300bF9ROyjy+xFEa yAdrcYsTaBN15O/qS77iNBS9BWuYolFjNfm1DeqgKk0YZFWZFBzMpKvpxKcpYe9oixmm qzzw== X-Gm-Message-State: AJcUukdf5y86Roe2h/NblTSY3R9R0PPa82NIpg2bqk9hVA4StCixTs5m oDvE9FVc7+Zef9qAdXtC3Ud3clI1VII= X-Google-Smtp-Source: ALg8bN40S89Xtrdwft10DGlVPE8nMli0CI4NhtpqLwwevZWuvDlT1u5oCU73A3zbiR5Wke+rG/m/jQ== X-Received: by 2002:a65:484c:: with SMTP id i12mr32407446pgs.309.1548962898877; Thu, 31 Jan 2019 11:28:18 -0800 (PST) From: Thomas Garnier To: kernel-hardening@lists.openwall.com Cc: kristen@linux.intel.com, Thomas Garnier , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, Juergen Gross , Thomas Garnier , "Peter Zijlstra (Intel)" , Nadav Amit , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org Subject: [PATCH v6 03/27] x86: Add macro to get symbol address for PIE support Date: Thu, 31 Jan 2019 11:24:10 -0800 Message-Id: <20190131192533.34130-4-thgarnie@chromium.org> X-Mailer: git-send-email 2.20.1.495.gaa96b0ce6b-goog In-Reply-To: <20190131192533.34130-1-thgarnie@chromium.org> References: <20190131192533.34130-1-thgarnie@chromium.org> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Add a new _ASM_MOVABS macro to fetch a symbol address. It will be used to replace "_ASM_MOV $, %dst" code construct that are not compatible with PIE. Signed-off-by: Thomas Garnier --- arch/x86/include/asm/asm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 6467757bb39f..5ff63ca80bca 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -30,6 +30,7 @@ #define _ASM_ALIGN __ASM_SEL(.balign 4, .balign 8) #define _ASM_MOV __ASM_SIZE(mov) +#define _ASM_MOVABS __ASM_SEL(movl, movabsq) #define _ASM_INC __ASM_SIZE(inc) #define _ASM_DEC __ASM_SIZE(dec) #define _ASM_ADD __ASM_SIZE(add)