From patchwork Thu Dec 5 00:09:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Garnier X-Patchwork-Id: 11273797 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A109930 for ; Thu, 5 Dec 2019 00:11:31 +0000 (UTC) Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.kernel.org (Postfix) with SMTP id 61EE6206DF for ; Thu, 5 Dec 2019 00:11:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="WEcqZpbc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 61EE6206DF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kernel-hardening-return-17462-patchwork-kernel-hardening=patchwork.kernel.org@lists.openwall.com Received: (qmail 28484 invoked by uid 550); 5 Dec 2019 00:10:34 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 28349 invoked from network); 5 Dec 2019 00:10:33 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=h4Dt4B0xvb6l2StfkmNXj0JeSmBC5J6hiTtCjiH9uWc=; b=WEcqZpbc1pZeNKaytuCxvflJzb3CvyBUE0VhX1AoSwi10PnANDNHhZP08zA68JySCe +CW5pEEMug0LNYGtcKsPGjKTUZHY5772Xq4DmJsPO/iZwlo59MHJpSb91SZOLSspoVBN S5mWPnOhEPt8Ov9ALUBkzfoWaFPjEMRzvrvd0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=h4Dt4B0xvb6l2StfkmNXj0JeSmBC5J6hiTtCjiH9uWc=; b=J5T9Nm5yBpWF3/MfzQjzjco4o+sdsLvUkpzAA2eUPs7udvEMkz72Ks7jEqHQ41Z02h lMMk2nvzhXDFvXmX4097uyh+VVnTMTO4lv84bvCAZf5UnzNPoZ8sDmWAzyyYtC6zw6jk NLmjOcAb7hScpliL7Jtumky/6dy2lOa8+66q2FvS2o7GMgtQY/jn4wpBsAKOIIPTWX4q aqaRNKoTObyRCxzgINbRO107NfnbYcnAcuVyy7RiavL2gPjot3FQGxArnYOj0LCBTkji MN0db/+E8U4WsReTiPTeqtmF4VCLoDFbhvieFQIuYGbTx738RZaok/260x9et/WRns99 w70A== X-Gm-Message-State: APjAAAV4y1TLJEOdM9A3frNbohg+OGPCxa5FQYdoBELch+cngu3Ij+Fk IUku21NJLqdL7Ln9tp0DsnvDNB1ixbw= X-Google-Smtp-Source: APXvYqzs7mYKYZ8RNkTKFC9raPmoZRYlLWxa85CESf7aVhfXMIKbbBi+m+lve2GIK5jr+LhkUWziBQ== X-Received: by 2002:a63:3484:: with SMTP id b126mr6187685pga.17.1575504620811; Wed, 04 Dec 2019 16:10:20 -0800 (PST) From: Thomas Garnier To: kernel-hardening@lists.openwall.com Cc: kristen@linux.intel.com, keescook@chromium.org, Thomas Garnier , Pavel Machek , "Rafael J . Wysocki" , "Rafael J. Wysocki" , Len Brown , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 07/11] x86/acpi: Adapt assembly for PIE support Date: Wed, 4 Dec 2019 16:09:44 -0800 Message-Id: <20191205000957.112719-8-thgarnie@chromium.org> X-Mailer: git-send-email 2.24.0.393.g34dc348eaf-goog In-Reply-To: <20191205000957.112719-1-thgarnie@chromium.org> References: <20191205000957.112719-1-thgarnie@chromium.org> MIME-Version: 1.0 Change the assembly code to use only relative references of symbols for the kernel to be PIE compatible. Position Independent Executable (PIE) support will allow to extend the KASLR randomization range below 0xffffffff80000000. Signed-off-by: Thomas Garnier Acked-by: Pavel Machek Acked-by: Rafael J. Wysocki Reviewed-by: Kees Cook --- arch/x86/kernel/acpi/wakeup_64.S | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S index c8daa92f38dc..8e221285d9f1 100644 --- a/arch/x86/kernel/acpi/wakeup_64.S +++ b/arch/x86/kernel/acpi/wakeup_64.S @@ -15,7 +15,7 @@ * Hooray, we are in Long 64-bit mode (but still running in low memory) */ SYM_FUNC_START(wakeup_long64) - movq saved_magic, %rax + movq saved_magic(%rip), %rax movq $0x123456789abcdef0, %rdx cmpq %rdx, %rax je 2f @@ -31,14 +31,14 @@ SYM_FUNC_START(wakeup_long64) movw %ax, %es movw %ax, %fs movw %ax, %gs - movq saved_rsp, %rsp + movq saved_rsp(%rip), %rsp - movq saved_rbx, %rbx - movq saved_rdi, %rdi - movq saved_rsi, %rsi - movq saved_rbp, %rbp + movq saved_rbx(%rip), %rbx + movq saved_rdi(%rip), %rdi + movq saved_rsi(%rip), %rsi + movq saved_rbp(%rip), %rbp - movq saved_rip, %rax + movq saved_rip(%rip), %rax jmp *%rax SYM_FUNC_END(wakeup_long64) @@ -48,7 +48,7 @@ SYM_FUNC_START(do_suspend_lowlevel) xorl %eax, %eax call save_processor_state - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -67,13 +67,14 @@ SYM_FUNC_START(do_suspend_lowlevel) pushfq popq pt_regs_flags(%rax) - movq $.Lresume_point, saved_rip(%rip) + leaq .Lresume_point(%rip), %rax + movq %rax, saved_rip(%rip) - movq %rsp, saved_rsp - movq %rbp, saved_rbp - movq %rbx, saved_rbx - movq %rdi, saved_rdi - movq %rsi, saved_rsi + movq %rsp, saved_rsp(%rip) + movq %rbp, saved_rbp(%rip) + movq %rbx, saved_rbx(%rip) + movq %rdi, saved_rdi(%rip) + movq %rsi, saved_rsi(%rip) addq $8, %rsp movl $3, %edi @@ -85,7 +86,7 @@ SYM_FUNC_START(do_suspend_lowlevel) .align 4 .Lresume_point: /* We don't restore %rax, it must be 0 anyway */ - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq saved_context_cr4(%rax), %rbx movq %rbx, %cr4 movq saved_context_cr3(%rax), %rbx