| Message ID | 20220112202259.3950286-1-keescook@chromium.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Headers | show |
| Series | [v2] arm64: atomics: lse: Dereference matching size | expand |
On Wed, 12 Jan 2022 12:22:59 -0800, Kees Cook wrote: > When building with -Warray-bounds, the following warning is generated: > > In file included from ./arch/arm64/include/asm/lse.h:16, > from ./arch/arm64/include/asm/cmpxchg.h:14, > from ./arch/arm64/include/asm/atomic.h:16, > from ./include/linux/atomic.h:7, > from ./include/asm-generic/bitops/atomic.h:5, > from ./arch/arm64/include/asm/bitops.h:25, > from ./include/linux/bitops.h:33, > from ./include/linux/kernel.h:22, > from kernel/printk/printk.c:22: > ./arch/arm64/include/asm/atomic_lse.h:247:9: warning: array subscript 'long unsigned int[0]' is partly outside array bounds of 'atomic_t[1]' [-Warray-bounds] > 247 | asm volatile( \ > | ^~~ > ./arch/arm64/include/asm/atomic_lse.h:266:1: note: in expansion of macro '__CMPXCHG_CASE' > 266 | __CMPXCHG_CASE(w, , acq_, 32, a, "memory") > | ^~~~~~~~~~~~~~ > kernel/printk/printk.c:3606:17: note: while referencing 'printk_cpulock_owner' > 3606 | static atomic_t printk_cpulock_owner = ATOMIC_INIT(-1); > | ^~~~~~~~~~~~~~~~~~~~ > > [...] Applied to arm64 (for-next/core), thanks! [1/1] arm64: atomics: lse: Dereference matching size https://git.kernel.org/arm64/c/3364c6ce23c6
diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h index d955ade5df7c..5d460f6b7675 100644 --- a/arch/arm64/include/asm/atomic_lse.h +++ b/arch/arm64/include/asm/atomic_lse.h @@ -249,7 +249,7 @@ __lse__cmpxchg_case_##name##sz(volatile void *ptr, \ " mov %" #w "[tmp], %" #w "[old]\n" \ " cas" #mb #sfx "\t%" #w "[tmp], %" #w "[new], %[v]\n" \ " mov %" #w "[ret], %" #w "[tmp]" \ - : [ret] "+r" (x0), [v] "+Q" (*(unsigned long *)ptr), \ + : [ret] "+r" (x0), [v] "+Q" (*(u##sz *)ptr), \ [tmp] "=&r" (tmp) \ : [old] "r" (x1), [new] "r" (x2) \ : cl); \ diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h index f9bef42c1411..497acf134d99 100644 --- a/arch/arm64/include/asm/cmpxchg.h +++ b/arch/arm64/include/asm/cmpxchg.h @@ -243,7 +243,7 @@ static inline void __cmpwait_case_##sz(volatile void *ptr, \ " cbnz %" #w "[tmp], 1f\n" \ " wfe\n" \ "1:" \ - : [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr) \ + : [tmp] "=&r" (tmp), [v] "+Q" (*(u##sz *)ptr) \ : [val] "r" (val)); \ }
When building with -Warray-bounds, the following warning is generated: In file included from ./arch/arm64/include/asm/lse.h:16, from ./arch/arm64/include/asm/cmpxchg.h:14, from ./arch/arm64/include/asm/atomic.h:16, from ./include/linux/atomic.h:7, from ./include/asm-generic/bitops/atomic.h:5, from ./arch/arm64/include/asm/bitops.h:25, from ./include/linux/bitops.h:33, from ./include/linux/kernel.h:22, from kernel/printk/printk.c:22: ./arch/arm64/include/asm/atomic_lse.h:247:9: warning: array subscript 'long unsigned int[0]' is partly outside array bounds of 'atomic_t[1]' [-Warray-bounds] 247 | asm volatile( \ | ^~~ ./arch/arm64/include/asm/atomic_lse.h:266:1: note: in expansion of macro '__CMPXCHG_CASE' 266 | __CMPXCHG_CASE(w, , acq_, 32, a, "memory") | ^~~~~~~~~~~~~~ kernel/printk/printk.c:3606:17: note: while referencing 'printk_cpulock_owner' 3606 | static atomic_t printk_cpulock_owner = ATOMIC_INIT(-1); | ^~~~~~~~~~~~~~~~~~~~ This is due to the compiler seeing an unsigned long * cast against something (atomic_t) that is int sized. Replace the cast with the matching size cast. This results in no change in binary output. Note that __ll_sc__cmpxchg_case_##name##sz already uses the same constraint: [v] "+Q" (*(u##sz *)ptr Which is why only the LSE form needs updating and not the LL/SC form, so this change is unlikely to be problematic. Cc: Will Deacon <will@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: linux-arm-kernel@lists.infradead.org Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Kees Cook <keescook@chromium.org> --- v1: https://lore.kernel.org/linux-hardening/20220107232746.1540130-1-keescook@chromium.org/ v2: - add Acks - note the existing LL/SC form --- arch/arm64/include/asm/atomic_lse.h | 2 +- arch/arm64/include/asm/cmpxchg.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)