diff mbox series

[3/5] arm64: dts: qcom: sm6375: Hook up I2C7 GPIOs

Message ID 20230818-topic-10v-v1-3-dbb6464223c6@linaro.org (mailing list archive)
State Handled Elsewhere
Headers show
Series Xperia 10 V support | expand

Commit Message

Konrad Dybcio Aug. 18, 2023, 3:23 p.m. UTC 
It's required to mux the GPIOs to a correct function to make sure
the I2C host can communicate with the devices on the other end.

Ensure that happens.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm6375.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi
index 4364b144eb93..b79908d969c7 100644
--- a/arch/arm64/boot/dts/qcom/sm6375.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi
@@ -875,6 +875,13 @@  qup_i2c2_default: qup-i2c2-default-state {
 				bias-pull-up;
 			};
 
+			qup_i2c7_default: qup-i2c7-default-state {
+				pins = "gpio27", "gpio28";
+				function = "qup11_f1";
+				drive-strength = <2>;
+				bias-pull-up;
+			};
+
 			qup_i2c8_default: qup-i2c8-default-state {
 				pins = "gpio19", "gpio20";
 				/* TLMM, GCC and vendor DT all have different indices.. */
@@ -1220,6 +1227,8 @@  i2c7: i2c@4c84000 {
 				clock-names = "se";
 				clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
 				interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
+				pinctrl-0 = <&qup_i2c7_default>;
+				pinctrl-names = "default";
 				dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
 				       <&gpi_dma1 1 1 QCOM_GPI_I2C>;
 				dma-names = "tx", "rx";