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[83.9.1.52]) by smtp.gmail.com with ESMTPSA id y2-20020ac24202000000b004fe4d122a66sm383715lfh.187.2023.08.18.08.23.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Aug 2023 08:23:51 -0700 (PDT) From: Konrad Dybcio Date: Fri, 18 Aug 2023 17:23:26 +0200 Subject: [PATCH 3/5] arm64: dts: qcom: sm6375: Hook up I2C7 GPIOs MIME-Version: 1.0 Message-Id: <20230818-topic-10v-v1-3-dbb6464223c6@linaro.org> References: <20230818-topic-10v-v1-0-dbb6464223c6@linaro.org> In-Reply-To: <20230818-topic-10v-v1-0-dbb6464223c6@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-hardening@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1692372226; l=1311; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=7pwAxQ89b609N+91Ei3/CUuL4YiJwIEnELBA4MpGvCI=; b=7wn65upp5DABUi+sBI8DHVsh9zu7rABI4hUp+7QKuPdyWzePy3XyRoaheS4lThoxcmmbMRVMe VnZDV+pn2f/DeBrx1hMhqUCRmJKPjYrp0uBV5JPx4EiJbqTVziy34xn X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-hardening@vger.kernel.org It's required to mux the GPIOs to a correct function to make sure the I2C host can communicate with the devices on the other end. Ensure that happens. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6375.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index 4364b144eb93..b79908d969c7 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -875,6 +875,13 @@ qup_i2c2_default: qup-i2c2-default-state { bias-pull-up; }; + qup_i2c7_default: qup-i2c7-default-state { + pins = "gpio27", "gpio28"; + function = "qup11_f1"; + drive-strength = <2>; + bias-pull-up; + }; + qup_i2c8_default: qup-i2c8-default-state { pins = "gpio19", "gpio20"; /* TLMM, GCC and vendor DT all have different indices.. */ @@ -1220,6 +1227,8 @@ i2c7: i2c@4c84000 { clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; interrupts = ; + pinctrl-0 = <&qup_i2c7_default>; + pinctrl-names = "default"; dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, <&gpi_dma1 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx";