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Mon, 16 Oct 2023 03:15:24 -0700 From: Kartik To: , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 7/8] soc/tegra: fuse: Add ACPI support for Tegra194 and Tegra234 Date: Mon, 16 Oct 2023 15:44:35 +0530 Message-ID: <20231016101436.7146-8-kkartik@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231016101436.7146-1-kkartik@nvidia.com> References: <20231016101436.7146-1-kkartik@nvidia.com> Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C8:EE_|MW3PR12MB4508:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c74d648-26f5-4277-33eb-08dbce30dda5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DAJ48sWstUPNxt8Uo7a0vtRBzyzVJY4eYZ7ly+Qnndmu46Rh1A3SLW7Avsut8dE5oBQGKDBmq6wgnSwjDnOVQVLjf0ahkFdAKWws1Bt6zHlGsBnBCdcbKXaUfyQgo50S8w+bm1PILl0dkpzrXJhFw8RD5hiHIq4Qu9UAT1/DA9CGn8aJPHG5htrKtjgXEkICeOcy3VjsbDUcqbLPQfwsOA3qUZQHuH44pk69iXwUt+Ill/mA5pUdY39fz3xGruquG3o5psgVcLUwLj2IeptmX26nZ7D4Jl3H05+pypljLumpbUpW8lazA1FGLtySMMVPkN0RjoVVFaz4utecA0Uiqmp5QSZBhdXWEV/pdsCPSCPgLfsDek8ES9I47jpuZjDuu7OzZXC5D5d+V3IuBGMjIF2PO1EvCoYxxFpZTGbhg40BMdAz2n50IgSub6v2Vls6pVP8z1w2Y1Ar4ZgDsu7hZWHZLVOziu7fT3TIqutc3tt7VBNjD6o4PbjTNUe1z8MMqOAOYkRUKeTsaQvFrQMdLTuRoPhw3XkP09kkD7h7UxxTXQsrZxuIhLV/u1cslu1J8JiBYCGckUOFuGOFKTTben4xQ5yZNTvlOwmNOPiRcug2kkqh5IOCUZ4R9b2Ma5aH44/FeaELktKN3egs0NlGvFCPmu0iA9SDwoCTSAF3HixP38kBM9X9a+EFDqahljmXjaGi7OZUEvfpw98edH5EA5KwUX/0MBByQ69Q4mQtyJwfcEIlUheCDODgTtyZDqd1KDug69GGSOAz9Xh9x9wsks3g6B9rsI/3FrVDjdzVG1Nts2VrO5aOMXkYGova6jbb X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(396003)(39860400002)(346002)(376002)(136003)(230922051799003)(64100799003)(1800799009)(82310400011)(451199024)(186009)(36840700001)(40470700004)(46966006)(110136005)(478600001)(6666004)(70206006)(70586007)(26005)(1076003)(2616005)(426003)(316002)(86362001)(336012)(8676002)(8936002)(7416002)(2906002)(5660300002)(41300700001)(36756003)(7636003)(921005)(47076005)(356005)(36860700001)(83380400001)(82740400003)(40460700003)(40480700001)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2023 10:15:47.3994 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c74d648-26f5-4277-33eb-08dbce30dda5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4508 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add ACPI support for Tegra194 & Tegra243 SoC's. This requires following modifications to the probe when ACPI boot is used: - Initialize soc data. - Add nvmem lookups. - Register soc device. - use devm_clk_get_optional() instead of devm_clk_get() to get fuse->clk, as fuse clocks are not required when using ACPI boot. Also, drop '__init' keyword for tegra_soc_device_register() as this is also used by tegra_fuse_probe() and use dev_err_probe() wherever applicable. Signed-off-by: Kartik --- v4 -> v5: * Fix build warnings seen with tegra_fuse_acpi_match when CONFIG_ACPI is disabled. v3 -> v4: * Use dev_fwnode() to dereference the fwnode. * Add MODULE_DEVICE_TABLE for tegra_fuse_acpi_match. * Moved tegra_fuse_acpi_match above tegra_fuse_driver i.e., close to the user of tegra_fuse_acpi_match. * Moved the improvements made to fuse clk/rst get error handling to separate patch. * Moved ACPI related initialization after fuse->base is initialized in tegra_fuse_probe(), as this triggers a warning in tegra_fuse_read_early() which is called from fuse->soc->init(). v2 -> v3: * Updated commit message to specify changes related to inclusion of dev_err_probe(). v1 -> v2: * Updated ACPI ID table 'tegra_fuse_acpi_match'. * Removed ',' after "{ /* sentinel */ }" in 'tegra_fuse_acpi_match'. * Using same probe for ACPI and device-tree boot. * Added code for required initialization when ACPI boot is used. * Make clocks optional for ACPI. * Use dev_err_probe() wherever applicable. * Check if clock has been initialized only when device-tree boot is used. --- drivers/soc/tegra/fuse/fuse-tegra.c | 52 +++++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 3 deletions(-) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 7a93c6512f7b..39a59545c93f 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -3,11 +3,13 @@ * Copyright (c) 2013-2023, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include #include #include +#include #include #include #include @@ -152,7 +154,38 @@ static int tegra_fuse_probe(struct platform_device *pdev) return PTR_ERR(fuse->base); fuse->phys = res->start; - fuse->clk = devm_clk_get(&pdev->dev, "fuse"); + /* Initialize the soc data and lookups if using ACPI boot. */ + if (is_acpi_node(dev_fwnode(&pdev->dev)) && !fuse->soc) { + u8 chip; + + tegra_acpi_init_apbmisc(); + + chip = tegra_get_chip_id(); + switch (chip) { +#if defined(CONFIG_ARCH_TEGRA_194_SOC) + case TEGRA194: + fuse->soc = &tegra194_fuse_soc; + break; +#endif +#if defined(CONFIG_ARCH_TEGRA_234_SOC) + case TEGRA234: + fuse->soc = &tegra234_fuse_soc; + break; +#endif + default: + return dev_err_probe(&pdev->dev, -EINVAL, "Unsupported SoC: %02x\n", chip); + } + + fuse->soc->init(fuse); + tegra_fuse_print_sku_info(&tegra_sku_info); + tegra_soc_device_register(); + + err = tegra_fuse_add_lookups(fuse); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to add FUSE lookups\n"); + } + + fuse->clk = devm_clk_get_optional(&pdev->dev, "fuse"); if (IS_ERR(fuse->clk)) return dev_err_probe(&pdev->dev, PTR_ERR(fuse->clk), "failed to get FUSE clock\n"); @@ -275,10 +308,17 @@ static const struct dev_pm_ops tegra_fuse_pm = { SET_SYSTEM_SLEEP_PM_OPS(tegra_fuse_suspend, tegra_fuse_resume) }; +static const struct acpi_device_id __maybe_unused tegra_fuse_acpi_match[] = { + { "NVDA200F" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(acpi, tegra_fuse_acpi_match); + static struct platform_driver tegra_fuse_driver = { .driver = { .name = "tegra-fuse", .of_match_table = tegra_fuse_match, + .acpi_match_table = ACPI_PTR(tegra_fuse_acpi_match), .pm = &tegra_fuse_pm, .suppress_bind_attrs = true, }, @@ -300,7 +340,13 @@ u32 __init tegra_fuse_read_early(unsigned int offset) int tegra_fuse_readl(unsigned long offset, u32 *value) { - if (!fuse->read || !fuse->clk) + /* + * Wait for fuse->clk to be initialized if device-tree boot is used. + */ + if (is_of_node(dev_fwnode(fuse->dev)) && !fuse->clk) + return -EPROBE_DEFER; + + if (!fuse->read) return -EPROBE_DEFER; if (IS_ERR(fuse->clk)) @@ -383,7 +429,7 @@ const struct attribute_group tegra194_soc_attr_group = { }; #endif -struct device * __init tegra_soc_device_register(void) +struct device *tegra_soc_device_register(void) { struct soc_device_attribute *attr; struct soc_device *dev;