| Message ID | 20240210-topic-1v-v1-4-fda0db38e29b@linaro.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 93395f9a8d52b89868d75e278adaf002f99dec22 |
| Headers | show |
| Series | Xperia 1 V support | expand |
On 12/02/2024 14:10, Konrad Dybcio wrote: > Like on earlier flagship Qualcomm SoCs, the SMMU is dma-coherent. > Mark it as such. > > Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi") > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index d696ec6c6850..868d48b85555 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -3934,6 +3934,7 @@ apps_smmu: iommu@15000000 { > <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; > + dma-coherent; > }; > > intc: interrupt-controller@17100000 { > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index d696ec6c6850..868d48b85555 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3934,6 +3934,7 @@ apps_smmu: iommu@15000000 { <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; + dma-coherent; }; intc: interrupt-controller@17100000 {
Like on earlier flagship Qualcomm SoCs, the SMMU is dma-coherent. Mark it as such. Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 + 1 file changed, 1 insertion(+)