From patchwork Fri Aug 4 08:45:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13341500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B26F9C001DB for ; Fri, 4 Aug 2023 08:47:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229483AbjHDIrE (ORCPT ); Fri, 4 Aug 2023 04:47:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229496AbjHDIq7 (ORCPT ); Fri, 4 Aug 2023 04:46:59 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0543B49C9; Fri, 4 Aug 2023 01:46:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1691138817; x=1722674817; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=MAcJ299wo3k+KdBjVHFQ6R9T4MfMmRMDb+y4waGUqbo=; b=LefVT/ui/fcTxEHGAtBfJc9JfvF+3TLqfKlpkwiz/M3DTEV824QPerPR JI655C2TELcazqceBAyul369MdGg83zjXy6Z6DZN/Q+kEllZTlplkp1fu iqGA7E5NTTnuG5RtzLEu3USOgD/METFjG8dk6ZPye8wX6o+o+Y5HXtnNY wVRDw8Qgmhbn+IRcsrb0ikV8/yBu5j51b5yjvKbRAE7oUhKgPycQH67mb MhMgxFaTHrkN1e1oZjtwW8vh1t4i0pSGg72PBHhQq2jNPBp/thydDN6XR eLSjIBAbH+T2Lc9xjax82VQyI86m0oAqaeIdc6zc9JSBctn7I2KhEtZ4d g==; X-IronPort-AV: E=McAfee;i="6600,9927,10791"; a="456478220" X-IronPort-AV: E=Sophos;i="6.01,254,1684825200"; d="scan'208";a="456478220" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2023 01:46:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10791"; a="765017754" X-IronPort-AV: E=Sophos;i="6.01,254,1684825200"; d="scan'208";a="765017754" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by orsmga001.jf.intel.com with ESMTP; 04 Aug 2023 01:46:36 -0700 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Jose Abreu , Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= , Jean Delvare , Guenter Roeck , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Philipp Zabel , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Wong Vee Khee , Jon Hunter , Jesse Brandeburg , Revanth Kumar Uppala , Shenwei Wang , Andrey Konovalov , Jochen Henneberg Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Tan Tee Min , Michael Sit Wei Hong , Lai Peter Jun Ann Subject: [PATCH net-next v2 0/5] TSN auto negotiation between 1G and 2.5G Date: Fri, 4 Aug 2023 16:45:22 +0800 Message-Id: <20230804084527.2082302-1-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Intel platforms’ integrated Gigabit Ethernet controllers support 2.5Gbps mode statically using BIOS programming. In the current implementation, the BIOS menu provides an option to select between 10/100/1000Mbps and 2.5Gbps modes. Based on the selection, the BIOS programs the Phase Lock Loop (PLL) registers. The BIOS also read the TSN lane registers from Flexible I/O Adapter (FIA) block and provided 10/100/1000Mbps/2.5Gbps information to the stmmac driver. But auto-negotiation between 10/100/1000Mbps and 2.5Gbps is not allowed. The new proposal is to support auto-negotiation between 10/100/1000Mbps and 2.5Gbps . Auto-negotiation between 10, 100, 1000Mbps will use in-band auto negotiation. Auto-negotiation between 10/100/1000Mbps and 2.5Gbps will work as the following proposed flow, the stmmac driver reads the PHY link status registers then identifies the negotiated speed. Based on the speed stmmac driver will identify TSN lane registers from FIA then send IPC command to the Power Management controller (PMC) through PMC driver/API. PMC will act as a proxy to programs the PLL registers. changelog: v1 -> v2: - Created intel_pmc_core.h in include/linux/platform_data/x86/ and export the desired functionality. - Add cur_link_an_mode to the kernel doc - Update cfg_link_an_mode value during phy driver changed - Combine 2 commits i.e. "stmmac: intel: Separate driver_data of ADL-N from TGL" and "net: stmmac: Add 1G/2.5G auto-negotiation support for ADL-N" into 1 commit. v1 -> v2: - Add static to pmc_lpm_modes declaration - Add cur_link_an_mode to the kernel doc - Combine 2 commits i.e. "stmmac: intel: Separate driver_data of ADL-N from TGL" and "net: stmmac: Add 1G/2.5G auto-negotiation support for ADL-N" into 1 commit. --- Choong Yong Liang (1): stmmac: intel: Add 1G/2.5G auto-negotiation support for ADL-N David E. Box (1): platform/x86: intel_pmc_core: Add IPC mailbox accessor function and add SoC register access Tan, Tee Min (3): net: pcs: xpcs: combine C37 SGMII AN and 2500BASEX for Intel mGbE controller net: phy: update in-band AN mode when changing interface by PHY driver net: stmmac: enable Intel mGbE 1G/2.5G auto-negotiation support MAINTAINERS | 1 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 183 +++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 81 ++++++++ .../net/ethernet/stmicro/stmmac/stmmac_main.c | 20 ++ drivers/net/pcs/pcs-xpcs.c | 72 +++++-- drivers/net/phy/marvell10g.c | 6 + drivers/net/phy/phylink.c | 4 + drivers/platform/x86/intel/pmc/core.c | 60 ++++++ include/linux/pcs/pcs-xpcs.h | 1 + include/linux/phy.h | 3 + .../linux/platform_data/x86/intel_pmc_core.h | 41 ++++ include/linux/stmmac.h | 1 + 13 files changed, 458 insertions(+), 16 deletions(-) create mode 100644 include/linux/platform_data/x86/intel_pmc_core.h