From patchwork Wed Mar 21 04:40:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 10298539 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B06CD60386 for ; Wed, 21 Mar 2018 04:40:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A00492973D for ; Wed, 21 Mar 2018 04:40:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 910032974F; Wed, 21 Mar 2018 04:40:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21BB92973D for ; Wed, 21 Mar 2018 04:40:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751774AbeCUEkw (ORCPT ); Wed, 21 Mar 2018 00:40:52 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12169 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751531AbeCUEkv (ORCPT ); Wed, 21 Mar 2018 00:40:51 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 20 Mar 2018 21:40:45 -0700 Received: from HQMAIL104.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 20 Mar 2018 21:40:46 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 20 Mar 2018 21:40:46 -0700 Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Mar 2018 04:40:49 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by UKMAIL102.nvidia.com (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Mar 2018 04:40:45 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Mar 2018 04:40:36 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH V2 1/9] pwm: core: Add support for PWM HW driver with pwm capture only Date: Wed, 21 Mar 2018 10:10:36 +0530 Message-ID: <1521607244-29734-2-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1521607244-29734-1-git-send-email-rrajk@nvidia.com> References: <1521607244-29734-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for pwm HW driver which has only capture functionality. This helps to implement the PWM based Tachometer driver which reads the PWM output signals from electronic fans. PWM Tachometer captures the period and duty cycle of the PWM signal Add conditional checks for callabacks enable(), disable(), config() to check if they are supported by the client driver or not. Skip these callbacks if they are not supported. Signed-off-by: Rajkumar Rampelli --- V2: Added if conditional checks for pwm callbacks since drivers may implements only pwm capture functionality. drivers/pwm/core.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c index 1581f6a..f70fe68 100644 --- a/drivers/pwm/core.c +++ b/drivers/pwm/core.c @@ -246,6 +246,10 @@ static bool pwm_ops_check(const struct pwm_ops *ops) if (ops->apply) return true; + /* driver supports capture operation */ + if (ops->capture) + return true; + return false; } @@ -495,7 +499,8 @@ int pwm_apply_state(struct pwm_device *pwm, struct pwm_state *state) * ->apply(). */ if (pwm->state.enabled) { - pwm->chip->ops->disable(pwm->chip, pwm); + if (pwm->chip->ops->disable) + pwm->chip->ops->disable(pwm->chip, pwm); pwm->state.enabled = false; } @@ -509,22 +514,26 @@ int pwm_apply_state(struct pwm_device *pwm, struct pwm_state *state) if (state->period != pwm->state.period || state->duty_cycle != pwm->state.duty_cycle) { - err = pwm->chip->ops->config(pwm->chip, pwm, + if (pwm->chip->ops->config) { + err = pwm->chip->ops->config(pwm->chip, pwm, state->duty_cycle, state->period); - if (err) - return err; + if (err) + return err; + } pwm->state.duty_cycle = state->duty_cycle; pwm->state.period = state->period; } if (state->enabled != pwm->state.enabled) { - if (state->enabled) { + if (state->enabled && pwm->chip->ops->enable) { err = pwm->chip->ops->enable(pwm->chip, pwm); if (err) return err; - } else { + } + + if (!state->enabled && pwm->chip->ops->disable) { pwm->chip->ops->disable(pwm->chip, pwm); }