From patchwork Tue May 29 10:02:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 10434829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0867C603B5 for ; Tue, 29 May 2018 10:14:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED2F728484 for ; Tue, 29 May 2018 10:14:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E1479285F1; Tue, 29 May 2018 10:14:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 784F228484 for ; Tue, 29 May 2018 10:14:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932854AbeE2KOe (ORCPT ); Tue, 29 May 2018 06:14:34 -0400 Received: from 212.199.177.27.static.012.net.il ([212.199.177.27]:32946 "EHLO herzl.nuvoton.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932881AbeE2KOH (ORCPT ); Tue, 29 May 2018 06:14:07 -0400 X-Greylist: delayed 645 seconds by postgrey-1.27 at vger.kernel.org; Tue, 29 May 2018 06:14:03 EDT Received: from talu34.nuvoton.co.il (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id w4TA2Oke031894; Tue, 29 May 2018 13:02:24 +0300 Received: by talu34.nuvoton.co.il (Postfix, from userid 10070) id 89B995AA0F; Tue, 29 May 2018 13:02:24 +0300 (IDT) From: Tomer Maimon To: robh+dt@kernel.org, mark.rutland@arm.com, jdelvare@suse.com, linux@roeck-us.net, avifishman70@gmail.com, yuenn@google.com, brendanhiggins@google.com, venture@google.com, joel@jms.id.au Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, openbmc@lists.ozlabs.org, Tomer Maimon Subject: [PATCH v1 1/2] dt-binding: hwmon: Add NPCM7xx PWM documentation Date: Tue, 29 May 2018 13:02:20 +0300 Message-Id: <1527588141-18639-2-git-send-email-tmaimon77@gmail.com> X-Mailer: git-send-email 1.8.3.4 In-Reply-To: <1527588141-18639-1-git-send-email-tmaimon77@gmail.com> References: <1527588141-18639-1-git-send-email-tmaimon77@gmail.com> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added device tree binding documentation for Nuvoton BMC NPCM7xx Pulse Width Modulation (PWM) controller. Signed-off-by: Tomer Maimon --- .../devicetree/bindings/hwmon/npcm7xx-pwm.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/npcm7xx-pwm.txt diff --git a/Documentation/devicetree/bindings/hwmon/npcm7xx-pwm.txt b/Documentation/devicetree/bindings/hwmon/npcm7xx-pwm.txt new file mode 100644 index 000000000000..2d8a7ccdc8cf --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/npcm7xx-pwm.txt @@ -0,0 +1,25 @@ +Nuvoton NPCM7xx Pulse-width modulation (PWM) controller device driver + +The NPCM7xx has two identical PWM controller modules, +Each module has four PWM controller outputs. +NPCM7xx PWM controller module 0 outputs PWM0-3 and NPCM7xx PWM controller +module 1 outputs PWM4-7. + +Required properties: +- compatible : "nuvoton,npcm750-pwm" for Poleg NPCM7XX. +- reg : Offset and length of the registers set for the device. +- clocks : phandle of pwm reference clock. +- pinctrl-names : a pinctrl state named "default" must be defined. +- pinctrl-0 : phandle referencing pin configuration of the PWM ports. + +pwm:pwm@f0103000 { + compatible = "nuvoton,npcm750-pwm"; + reg = <0xf0103000 0x50 + 0xf0104000 0x50>; + clocks = <&clk NPCM7XX_CLK_APB3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins &pwm1_pins + &pwm2_pins &pwm3_pins + &pwm4_pins &pwm5_pins + &pwm6_pins &pwm7_pins>; +};