From patchwork Tue Apr 18 20:17:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Mayer X-Patchwork-Id: 9686283 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 774FE602C2 for ; Tue, 18 Apr 2017 20:33:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 68B2A283E2 for ; Tue, 18 Apr 2017 20:33:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B6F0283F4; Tue, 18 Apr 2017 20:33:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D77BF283E2 for ; Tue, 18 Apr 2017 20:33:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754380AbdDRUdc (ORCPT ); Tue, 18 Apr 2017 16:33:32 -0400 Received: from smtp-out-no.shaw.ca ([64.59.134.13]:36715 "EHLO smtp-out-no.shaw.ca" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752748AbdDRUdc (ORCPT ); Tue, 18 Apr 2017 16:33:32 -0400 X-Greylist: delayed 487 seconds by postgrey-1.27 at vger.kernel.org; Tue, 18 Apr 2017 16:33:20 EDT Received: from triton.mmayer.net ([96.48.165.49]) by shaw.ca with SMTP id 0ZgedSyipoUq60ZgfdBGnU; Tue, 18 Apr 2017 14:25:23 -0600 X-Authority-Analysis: v=2.2 cv=JLpLi4Cb c=1 sm=1 tr=0 a=k5HOQ6ZN7M0zyjl8M7O1NA==:117 a=k5HOQ6ZN7M0zyjl8M7O1NA==:17 a=AzvcPWV-tVgA:10 a=Q-fNiiVtAAAA:8 a=W2lys9qh77z9tDEjxJAA:9 a=Z1CLZT3w60Yh-lRv:21 a=LqWoawBflL6qeA5S:21 a=Fp8MccfUoT0GBdDC_Lng:22 Received: by triton.mmayer.net (Postfix, from userid 501) id 63C073E915D6; Tue, 18 Apr 2017 13:25:20 -0700 (PDT) From: Markus Mayer To: Jean Delvare , Guenter Roeck , Rob Herring , Mark Rutland , Florian Fainelli Cc: Markus Mayer , Broadcom Kernel List , Linux HWMON List , Device Tree List , ARM Kernel List , Linux Kernel Mailing List Subject: [PATCH 1/2] dt/bindings: Add bindings for Broadcom STB DRAM Sensors Date: Tue, 18 Apr 2017 13:17:01 -0700 Message-Id: <20170418201702.57019-2-code@mmayer.net> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170418201702.57019-1-code@mmayer.net> References: <20170418201702.57019-1-code@mmayer.net> X-CMAE-Envelope: MS4wfKjwYoCTmYbhi0y0KUlvkNcKpRdM0EDve3CHVQSqIEZgOEi6llIPQs2wEdoQeuJZ3VtIErjN7I11cIC2ASR719TwFbgSybX5syBenOSsNd2YamhoVWkI nXJWK0Juv58HSOAkYuLaWzo59FTWz8Vlj7lnlZq2mrzWr2yx2o6CkP1qw45H5yGt5xuH7B1Kae52m/6ZVKJ2J5nmhgf4Ex+HozDXRzsi+1cACMlpRGaIXF46 c+MR5tzIYkjGLcF0D0kRUF+/Qw2xGFZg5wGWBqO6U0nNNtD32TyooT8eNktGVUhazLplKfDPbDRIw0jhtDtcfIJsovd0p4mzbRzT8LeymVin/eAHnBLcNVVx R0tfCBEM3NwLGysWi3EzCudwv1McSwYPqPidAMvSnJjYyQcbYqhTZ5fYRg1TDapOhv0Lpa7AAwszbdypt3YFgm2srKmEVXPh6gDrgqlUNY+6dA+uupmKp9tu yAFqPjgieho+Hitm8fr/NjMsP/pkJhvY9F/2UcD02gaZNIZiSkDRT0EKrJcH6dOhcA8zvuzJJ+pR7/VA Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Markus Mayer Provide bindings for the Broadcom STB DDR PHY Front End (DPFE). Signed-off-by: Markus Mayer --- .../devicetree/bindings/hwmon/brcmstb-dpfe.txt | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/brcmstb-dpfe.txt diff --git a/Documentation/devicetree/bindings/hwmon/brcmstb-dpfe.txt b/Documentation/devicetree/bindings/hwmon/brcmstb-dpfe.txt new file mode 100644 index 0000000..3519197 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/brcmstb-dpfe.txt @@ -0,0 +1,68 @@ +DDR PHY Front End (DPFE) for Broadcom STB +========================================= + +DPFE and the DPFE firmware provide an interface for the host CPU to +communicate with the DCPU, which resides inside the DDR PHY. + +There are three memory regions for interacting with the DCPU. + +The DCPU Register Space +----------------------- + +Required properties: + - compatible: must be one of brcm,bcm7271-dpfe-cpu, brcm,dpfe-cpu-v12.0.0.0 + or brcm,dpfe-cpu + - reg: must reference the start address and length of the DCPU register + space + +Optional properties: + - cell-index: the index of the DPFE instance; will default to 0 if not set + +Example: + dpfe_cpu0: dpfe-cpu@f1132000 { + compatible = "brcm,bcm7271-dpfe-cpu", + "brcm,dpfe-cpu-v12.0.0.0", + "brcm,dpfe-cpu"; + reg = <0xf1132000 0x180>; + cell-index = <0>; + }; + +The DCPU Data Memory Space +-------------------------- + +Required properties: + - compatible: must be one of brcm,bcm7271-dpfe-dmem, brcm,dpfe-dmem-v12.0.0.0 + or brcm,dpfe-dmem + - reg: must reference the start address and length of the DCPU DMEM space + +Optional properties: + - cell-index: the index of the DPFE instance; will default to 0 if not set + +Example: + dpfe_dmem0: dpfe-dmem@f1134000 { + compatible = "brcm,bcm7271-dpfe-dmem", + "brcm,dpfe-dmem-v12.0.0.0", + "brcm,dpfe-dmem"; + reg = <0xf1134000 0x1000>; + cell-index = <0>; + }; + +The DCPU Instruction Memory Space +--------------------------------- + +Required properties: + - compatible: must be one of brcm,bcm7271-dpfe-imem, brcm,dpfe-imem-v12.0.0.0 + or brcm,dpfe-imem + - reg: must reference the start address and length of the DCPU IMEM space + +Optional properties: + - cell-index: the index of the DPFE instance; will default to 0 if not set + +Example: + dpfe_imem0: dpfe-imem@f1138000 { + compatible = "brcm,bcm7271-dpfe-imem", + "brcm,dpfe-imem-v12.0.0.0", + "brcm,dpfe-imem"; + reg = <0xf1138000 0x4000>; + cell-index = <0>; + };