From patchwork Thu Jun 1 14:25:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Leis X-Patchwork-Id: 9759649 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7AA60602BF for ; Thu, 1 Jun 2017 14:25:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6B6932849A for ; Thu, 1 Jun 2017 14:25:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F95F284DA; Thu, 1 Jun 2017 14:25:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 021892849A for ; Thu, 1 Jun 2017 14:25:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751083AbdFAOZy (ORCPT ); Thu, 1 Jun 2017 10:25:54 -0400 Received: from mail-it0-f49.google.com ([209.85.214.49]:37780 "EHLO mail-it0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751090AbdFAOZx (ORCPT ); Thu, 1 Jun 2017 10:25:53 -0400 Received: by mail-it0-f49.google.com with SMTP id m47so21348085iti.0 for ; Thu, 01 Jun 2017 07:25:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=0P8C22UXPAHqgNgNkV2Lgaj3JvMuiRPcQ5IJHdUP75w=; b=M3qjLOdWiJgH7U5ppfUOb/of4AaiwzOUWwXpnMEfuMQPD0SQY13ROnkLqQBXzt0Y5V dKjEX7AD5Ofve9lAxsj3x9nO+hOGj8MaUP3bQGox81AfxWq+KmQ2bJcz10ePwOm8LyXq ihocsPXNOcet86PX0nH8HQhCaX41v+DNOlpRLouD9CfzeieMeH+6N53DUW97pqhHdB8W JVkdqax8+nR5omQabozfzNa006Irgy4Zsusf3Ag4vtS3EhuGLHIQhjc9dSgYPnbQ+CNM ser+CEQkAU8HNnjfi0Ca4gMv/EilphrMw6Nal9wReMMx9E4zCmqW9oGDs44Pz1H8aGyt gZLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=0P8C22UXPAHqgNgNkV2Lgaj3JvMuiRPcQ5IJHdUP75w=; b=H4aJjrwPf1OlnEn2mGYEebrnzyi3jxQY72BWsZqMnRJhJS4jS8hBXxWh1vWIOzKJOh 4SC8mBQjj8dr0hFC4PjcIkfGOAuYlbSlJt7ogpRucu88sZ3qaYPVkZT+AQDANOL9HC4R UabH7MN8BgP+WeXTRon3Y9yYK796DdrSxIdNYC4G4YyH/HYUxFshdhUbm7FMnHRZTca6 jpeWReruEr7NdII6UZJH5TBdjBx9aFyPV1bB62MWxVP0pDwZxDwevgWlMF5vT69S0KuV pGbt649G/PR0S/Hkqa/1gRJOn0cPgT7VsfKVyh56U4xiYXo5Khkmsmqq+scTh+FAndV+ Mlag== X-Gm-Message-State: AODbwcBwmrdDx1uP1Jy4jOglzqlIPEqz2iNZEMXaO9SR1kPH4whAWxcU P3LWZkQr4LtGxHQS X-Received: by 10.36.227.194 with SMTP id d185mr5668044ith.56.1496327152651; Thu, 01 Jun 2017 07:25:52 -0700 (PDT) Received: from venture.svl.corp.google.com ([100.123.242.104]) by smtp.gmail.com with ESMTPSA id g198sm12627522itb.29.2017.06.01.07.25.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Jun 2017 07:25:39 -0700 (PDT) From: Patrick Venture To: joel@jms.id.au, jdelvare@suse.com, linux@roeck-us.net, linux-hwmon@vger.kernel.org Cc: Patrick Venture Subject: [PATCH v2] hwmon: (aspeed-pwm-tacho) Enable both edge measurement. Date: Thu, 1 Jun 2017 07:25:33 -0700 Message-Id: <20170601142533.164496-1-venture@google.com> X-Mailer: git-send-email 2.13.0.219.gdb65acc882-goog Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The aspeed-pwm-tacho controller supports measuring the fan tach by using leading, falling, or both edges. This change allows the driver to support either of the three configurations and will appropriately modify the returned tach data. If the controller is measuring with both edges it can return a value more quickly to the requestor. This version of the driver should still take ~1s to return with an RPM value per fan, however, it can be tuned faster with double edge counting enabled than without. I tested this and found the number returned matched what I expected. Signed-off-by: Patrick Venture --- drivers/hwmon/aspeed-pwm-tacho.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/hwmon/aspeed-pwm-tacho.c b/drivers/hwmon/aspeed-pwm-tacho.c index 48403a2115be..f288928b5e8a 100644 --- a/drivers/hwmon/aspeed-pwm-tacho.c +++ b/drivers/hwmon/aspeed-pwm-tacho.c @@ -145,11 +145,20 @@ #define PWM_MAX 255 +#define BOTH_EDGES 0x02 /* 10b */ + #define M_PWM_DIV_H 0x00 #define M_PWM_DIV_L 0x05 #define M_PWM_PERIOD 0x5F #define M_TACH_CLK_DIV 0x00 -#define M_TACH_MODE 0x00 +/* + * 5:4 Type N fan tach mode selection bit: + * 00: falling + * 01: rising + * 10: both + * 11: reserved. + */ +#define M_TACH_MODE 0x02 /* 10b */ #define M_TACH_UNIT 0x1000 #define INIT_FAN_CTRL 0xFF @@ -162,6 +171,7 @@ struct aspeed_pwm_tacho_data { u8 type_pwm_clock_division_h[3]; u8 type_pwm_clock_division_l[3]; u8 type_fan_tach_clock_division[3]; + u8 type_fan_tach_mode[3]; u16 type_fan_tach_unit[3]; u8 pwm_port_type[8]; u8 pwm_port_fan_ctrl[8]; @@ -498,7 +508,7 @@ static u32 aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, u8 fan_tach_ch) { u32 raw_data, tach_div, clk_source, sec, val; - u8 fan_tach_ch_source, type; + u8 fan_tach_ch_source, type, mode, both; regmap_write(priv->regmap, ASPEED_PTCR_TRIGGER, 0); regmap_write(priv->regmap, ASPEED_PTCR_TRIGGER, 0x1 << fan_tach_ch); @@ -512,7 +522,14 @@ static u32 aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, regmap_read(priv->regmap, ASPEED_PTCR_RESULT, &val); raw_data = val & RESULT_VALUE_MASK; tach_div = priv->type_fan_tach_clock_division[type]; - tach_div = 0x4 << (tach_div * 2); + /* + * We need the mode to determine if the raw_data is double (from + * counting both edges). + */ + mode = priv->type_fan_tach_mode[type]; + both = (mode & BOTH_EDGES) ? 1 : 0; + + tach_div = (0x4 << both) << (tach_div * 2); clk_source = priv->clk_freq; if (raw_data == 0) @@ -696,6 +713,7 @@ static void aspeed_create_type(struct aspeed_pwm_tacho_data *priv) aspeed_set_tacho_type_enable(priv->regmap, TYPEM, true); priv->type_fan_tach_clock_division[TYPEM] = M_TACH_CLK_DIV; priv->type_fan_tach_unit[TYPEM] = M_TACH_UNIT; + priv->type_fan_tach_mode[TYPEM] = M_TACH_MODE; aspeed_set_tacho_type_values(priv->regmap, TYPEM, M_TACH_MODE, M_TACH_UNIT, M_TACH_CLK_DIV); }