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[linux,hwmon-next,v2,2/3] hwmon: (sbtsi) Add documentation

Message ID 20200323233354.239365-3-kunyi@google.com (mailing list archive)
State Changes Requested
Headers show
Series SB-TSI hwmon driver v2 | expand

Commit Message

Kun Yi March 23, 2020, 11:33 p.m. UTC 
Document the SB-TSI sensor interface driver.

Signed-off-by: Kun Yi <kunyi@google.com>
Change-Id: I4b086a124d1d94a516386b0d2ff1cd7180b1dac1
---
 Documentation/hwmon/sbtsi_temp.rst | 40 ++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/hwmon/sbtsi_temp.rst

Comments

Guenter Roeck March 31, 2020, 3:42 p.m. UTC | #1 
On Mon, Mar 23, 2020 at 04:33:53PM -0700, Kun Yi wrote:
> Document the SB-TSI sensor interface driver.
> 
> Signed-off-by: Kun Yi <kunyi@google.com>
> Change-Id: I4b086a124d1d94a516386b0d2ff1cd7180b1dac1
> ---
>  Documentation/hwmon/sbtsi_temp.rst | 40 ++++++++++++++++++++++++++++++

The new file also needs to be added to Documentation/hwmon/index.rst.

Guenter
diff mbox series

Patch

diff --git a/Documentation/hwmon/sbtsi_temp.rst b/Documentation/hwmon/sbtsi_temp.rst
new file mode 100644
index 000000000000..9f0f197c8aa2
--- /dev/null
+++ b/Documentation/hwmon/sbtsi_temp.rst
@@ -0,0 +1,40 @@ 
+Kernel driver sbtsi_temp
+==================
+
+Supported hardware:
+
+  * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI)
+    compliant AMD SoC temperature device.
+
+    Prefix: 'sbtsi_temp'
+
+    Addresses scanned: This driver doesn't support address scanning.
+
+    To instantiate this driver on an AMD CPU with SB-TSI
+    support, the i2c bus number would be the bus connected from the board
+    management controller (BMC) to the CPU. The i2c address is specified in
+    Section 6.3.1 of the SoC register reference: The SB-TSI address is normally
+    98h for socket 0 and 90h for socket 1, but it could vary based on hardware
+    address select pins.
+
+    Datasheet: The SB-TSI interface and protocol is available as part of
+               the open source SoC register reference at:
+
+	       https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
+
+               The Advanced Platform Management Link (APML) Specification is
+               available at:
+
+	       http://developer.amd.com/wordpress/media/2012/10/41918.pdf
+
+Author: Kun Yi <kunyi@google.com>
+
+Description
+-----------
+
+The SBI temperature sensor interface (SB-TSI) is an emulation of the software
+and physical interface of a typical 8-pin remote temperature sensor (RTS) on
+AMD SoCs. It implements one temperature sensor with readings and limit
+registers encode the temperature in increments of 0.125 from 0 to 255.875.
+Limits can be set through the writable thresholds, and if reached will trigger
+corresponding alert signals.