@@ -246,6 +246,14 @@ config RENESAS_RZA1_IRQC
Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
to 8 external interrupts with configurable sense select.
+config SL28CPLD_INTC
+ bool "Kontron sl28cpld IRQ controller"
+ select MFD_SIMPLE_MFD_I2C
+ select REGMAP_IRQ
+ help
+ Interrupt controller driver for the board management controller
+ found on the Kontron sl28 CPLD.
+
config ST_IRQCHIP
bool
select REGMAP
@@ -111,3 +111,4 @@ obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o
obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o
obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o
obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o
+obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o
new file mode 100644
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * sl28cpld interrupt controller driver
+ *
+ * Copyright 2020 Kontron Europe GmbH
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+
+#define INTC_IE 0x00
+#define INTC_IP 0x01
+
+static const struct regmap_irq sl28cpld_irqs[] = {
+ REGMAP_IRQ_REG_LINE(0, 8),
+ REGMAP_IRQ_REG_LINE(1, 8),
+ REGMAP_IRQ_REG_LINE(2, 8),
+ REGMAP_IRQ_REG_LINE(3, 8),
+ REGMAP_IRQ_REG_LINE(4, 8),
+ REGMAP_IRQ_REG_LINE(5, 8),
+ REGMAP_IRQ_REG_LINE(6, 8),
+ REGMAP_IRQ_REG_LINE(7, 8),
+};
+
+struct sl28cpld_intc {
+ struct regmap *regmap;
+ struct regmap_irq_chip chip;
+ struct regmap_irq_chip_data *irq_data;
+};
+
+static int sl28cpld_intc_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sl28cpld_intc *irqchip;
+ int irq;
+ u32 base;
+ int ret;
+
+ if (!dev->parent)
+ return -ENODEV;
+
+ irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
+ if (!irqchip)
+ return -ENOMEM;
+
+ irqchip->regmap = dev_get_regmap(dev->parent, NULL);
+ if (!irqchip->regmap)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = device_property_read_u32(&pdev->dev, "reg", &base);
+ if (ret)
+ return -EINVAL;
+
+ irqchip->chip.name = "sl28cpld-intc";
+ irqchip->chip.irqs = sl28cpld_irqs;
+ irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs);
+ irqchip->chip.num_regs = 1;
+ irqchip->chip.status_base = base + INTC_IP;
+ irqchip->chip.mask_base = base + INTC_IE;
+ irqchip->chip.mask_invert = true,
+ irqchip->chip.ack_base = base + INTC_IP;
+
+ return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev),
+ irqchip->regmap, irq,
+ IRQF_SHARED | IRQF_ONESHOT, 0,
+ &irqchip->chip,
+ &irqchip->irq_data);
+}
+
+static const struct of_device_id sl28cpld_intc_of_match[] = {
+ { .compatible = "kontron,sl28cpld-intc" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match);
+
+static struct platform_driver sl28cpld_intc_driver = {
+ .probe = sl28cpld_intc_probe,
+ .driver = {
+ .name = "sl28cpld-intc",
+ .of_match_table = sl28cpld_intc_of_match,
+ }
+};
+module_platform_driver(sl28cpld_intc_driver);
+
+MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
Add support for the interrupt controller inside the sl28 CPLD management controller. The interrupt controller can handle at most 8 interrupts and is really simplistic and consists only of an interrupt mask and an interrupt pending register. Signed-off-by: Michael Walle <michael@walle.cc> --- Changes since v4: - update copyright year - don't use "int irq" instead of "unsigne int irq", because platform_get_irq() might return a negative error code. Found by "kernel test robot <lkp@intel.com> - remove comma in terminator line of the compatible strings list, suggested by Andy - use newer devm_regmap_add_irq_chip_fwnode() - don't use KBUID_MODNAME, suggested by Andy - remove the platform device table Changes since v3: - see cover letter drivers/irqchip/Kconfig | 8 +++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sl28cpld.c | 96 ++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) create mode 100644 drivers/irqchip/irq-sl28cpld.c