diff mbox series

[v2,1/5] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards

Message ID 20210625074213.654274-2-martin@geanix.com (mailing list archive)
State Superseded
Headers show
Series fpga/mfd/hwmon: Initial support for Silicom N5010 PAC | expand

Commit Message

Martin Hundebøll June 25, 2021, 7:42 a.m. UTC
From: Martin Hundebøll <mhu@silicom.dk>

This adds the approved PCI Express Device IDs for the Silicom PAC N5010
and N5011 cards (aka. Silicom Lightning Creek cards).

The N5010 features an FPGA that manages/interfaces four QSFP ports, and
allows on-board custom packet processing/filtering/routing, based on
logic loaded with user-provided FPGA bitstreams.

The N5011 cards adds a PCIe switch that exposes, in addition to the FPGA
itself, two Intel E810 (aka Columbiaville) ethernet controllers. With
this, packets can be forwarded from the FPGA to the host for further
processing.

Signed-off-by: Martin Hundebøll <mhu@silicom.dk>
Acked-by: Wu Hao <hao.wu@intel.com>
---

Changes since v1:
 * Commit message is updated with card description
 * Added Hao's Acked-by

 drivers/fpga/dfl-pci.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Moritz Fischer June 25, 2021, 6:43 p.m. UTC | #1
On Fri, Jun 25, 2021 at 09:42:09AM +0200, Martin Hundebøll wrote:
> From: Martin Hundebøll <mhu@silicom.dk>
> 
> This adds the approved PCI Express Device IDs for the Silicom PAC N5010
> and N5011 cards (aka. Silicom Lightning Creek cards).
> 
> The N5010 features an FPGA that manages/interfaces four QSFP ports, and
> allows on-board custom packet processing/filtering/routing, based on
> logic loaded with user-provided FPGA bitstreams.
> 
> The N5011 cards adds a PCIe switch that exposes, in addition to the FPGA
> itself, two Intel E810 (aka Columbiaville) ethernet controllers. With
> this, packets can be forwarded from the FPGA to the host for further
> processing.
> 
> Signed-off-by: Martin Hundebøll <mhu@silicom.dk>
> Acked-by: Wu Hao <hao.wu@intel.com>
> ---
> 
> Changes since v1:
>  * Commit message is updated with card description
>  * Added Hao's Acked-by
> 
>  drivers/fpga/dfl-pci.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index b44523ea8c91..4d68719e608f 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -74,6 +74,9 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
>  #define PCIE_DEVICE_ID_PF_DSC_1_X		0x09C4
>  #define PCIE_DEVICE_ID_INTEL_PAC_N3000		0x0B30
>  #define PCIE_DEVICE_ID_INTEL_PAC_D5005		0x0B2B
> +#define PCIE_DEVICE_ID_SILICOM_PAC_N5010	0x1000
> +#define PCIE_DEVICE_ID_SILICOM_PAC_N5011	0x1001
> +
>  /* VF Device */
>  #define PCIE_DEVICE_ID_VF_INT_5_X		0xBCBF
>  #define PCIE_DEVICE_ID_VF_INT_6_X		0xBCC1
> @@ -90,6 +93,8 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
>  	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_N3000),},
>  	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005),},
>  	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
> +	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
> +	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
>  	{0,}
>  };
>  MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
> -- 
> 2.31.0
> 
Applied to for-next.

Thanks
diff mbox series

Patch

diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index b44523ea8c91..4d68719e608f 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c
@@ -74,6 +74,9 @@  static void cci_pci_free_irq(struct pci_dev *pcidev)
 #define PCIE_DEVICE_ID_PF_DSC_1_X		0x09C4
 #define PCIE_DEVICE_ID_INTEL_PAC_N3000		0x0B30
 #define PCIE_DEVICE_ID_INTEL_PAC_D5005		0x0B2B
+#define PCIE_DEVICE_ID_SILICOM_PAC_N5010	0x1000
+#define PCIE_DEVICE_ID_SILICOM_PAC_N5011	0x1001
+
 /* VF Device */
 #define PCIE_DEVICE_ID_VF_INT_5_X		0xBCBF
 #define PCIE_DEVICE_ID_VF_INT_6_X		0xBCC1
@@ -90,6 +93,8 @@  static struct pci_device_id cci_pcie_id_tbl[] = {
 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_N3000),},
 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005),},
 	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
+	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
+	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
 	{0,}
 };
 MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);