From patchwork Thu Jun 22 04:19:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13288262 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E7E2EB64DB for ; Thu, 22 Jun 2023 04:21:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230365AbjFVEVQ (ORCPT ); Thu, 22 Jun 2023 00:21:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230460AbjFVEVD (ORCPT ); Thu, 22 Jun 2023 00:21:03 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E72DE1BE5; Wed, 21 Jun 2023 21:20:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687407657; x=1718943657; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LGc33bAqtZims+Z8ZWCPakULdlqRvmto6XOz1iabewY=; b=mzaHTrEdnuf0LF8cC5q/9Lf0kh6TxV0nMuI7o7vtLD8fCR1UyL1J09SL IsmBLai4klOp/Fx8VOPQc/py3GsZZbi8OE8MG8m8RjN9dyapSBkeD6JTT AYoi+jnds48oGynUNz/wsoJlS2ujqrxuOWsk8k03MpjYyd8niJud7ph2y d1ga/8aIWfs/p1pe3QGOkC1crQGixevGNVA35qceW6glf6kfXmrKwiPQh RHFKSmshtgw/wP7DnVcEPG+RwGk9PAnYEjTw5yE4NYnpWldpYkg1Dy3hB eBZl3e65AkkqG4wpUFXw3PBsIi5y+vqZVuOgnqpFw5jObae60LvYO/UFH w==; X-IronPort-AV: E=McAfee;i="6600,9927,10748"; a="363812331" X-IronPort-AV: E=Sophos;i="6.00,262,1681196400"; d="scan'208";a="363812331" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2023 21:20:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10748"; a="744453913" X-IronPort-AV: E=Sophos;i="6.00,262,1681196400"; d="scan'208";a="744453913" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by orsmga008.jf.intel.com with ESMTP; 21 Jun 2023 21:20:45 -0700 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Jose Abreu , Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= , Jean Delvare , Guenter Roeck , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Philipp Zabel , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Wong Vee Khee , Jon Hunter , Jesse Brandeburg , Revanth Kumar Uppala , Shenwei Wang , Andrey Konovalov , Jochen Henneberg Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Tan@vger.kernel.org, Tee Min , Michael Sit Wei Hong , Lai Peter Jun Ann Subject: [PATCH net-next 6/6] net: stmmac: Add 1G/2.5G auto-negotiation support for ADL-N Date: Thu, 22 Jun 2023 12:19:05 +0800 Message-Id: <20230622041905.629430-7-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230622041905.629430-1-yong.liang.choong@linux.intel.com> References: <20230622041905.629430-1-yong.liang.choong@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add modphy register lane to have 1G/2.5G auto-negotiation support for ADL-N. Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 34 ++++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 2 ++ 2 files changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 1ffa03451d26..024f436b276e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -963,14 +963,46 @@ static struct stmmac_pci_info adls_sgmii1g_phy1_info = { .setup = adls_sgmii_phy1_data, }; +static int adln_common_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->rx_queues_to_use = 6; + plat->tx_queues_to_use = 4; + plat->clk_ptp_rate = 204800000; + + plat->safety_feat_cfg->tsoee = 1; + plat->safety_feat_cfg->mrxpee = 0; + plat->safety_feat_cfg->mestee = 1; + plat->safety_feat_cfg->mrxee = 1; + plat->safety_feat_cfg->mtxee = 1; + plat->safety_feat_cfg->epsi = 0; + plat->safety_feat_cfg->edpp = 0; + plat->safety_feat_cfg->prtyen = 0; + plat->safety_feat_cfg->tmouten = 0; + + intel_priv->tsn_lane_registers = adln_tsn_lane_registers; + intel_priv->max_tsn_lane_registers = ARRAY_SIZE(adln_tsn_lane_registers); + + return intel_mgbe_common_data(pdev, plat); +} + static int adln_sgmii_phy0_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->max_speed = SPEED_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; - return tgl_common_data(pdev, plat); + plat->config_serdes = intel_config_serdes; + + intel_priv->pid_modphy = PID_MODPHY1; + + return adln_common_data(pdev, plat); } static struct stmmac_pci_info adln_sgmii1g_phy0_info = { diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 75a336cf8af1..349c160c17b3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -124,8 +124,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { {} }; +static const int adln_tsn_lane_registers[] = {6}; static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11}; #else +static const int adln_tsn_lane_registers[] = {}; static const int ehl_tsn_lane_registers[] = {}; #endif /* CONFIG_INTEL_PMC_CORE */