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Fri, 29 Sep 2023 03:37:06 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Fri, 29 Sep 2023 03:37:06 -0700 Received: from moonraker.home (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.986.41 via Frontend Transport; Fri, 29 Sep 2023 03:37:04 -0700 From: Jon Hunter To: Jean Delvare , Guenter Roeck , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , Thierry Reding CC: , , , Jon Hunter Subject: [PATCH V5 4/4] arm64: tegra: Add power-sensors for Tegra234 boards Date: Fri, 29 Sep 2023 11:36:50 +0100 Message-ID: <20230929103650.86074-5-jonathanh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929103650.86074-1-jonathanh@nvidia.com> References: <20230929103650.86074-1-jonathanh@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D5:EE_|CY5PR12MB6549:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d905c2e-7a79-4ae2-8d10-08dbc0d80ce6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Sep 2023 10:37:16.3868 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d905c2e-7a79-4ae2-8d10-08dbc0d80ce6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6549 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Populate the ina219 and ina3221 power-sensors for the various Tegra234 boards. These sensors are located on the Tegra234 module boards and the configuration of some sensors is common across the different Tegra234 modules. Therefore, add any common sensor configurations to appropriate device tree source file so it can be re-used across modules. Signed-off-by: Jon Hunter --- .../boot/dts/nvidia/tegra234-p3701-0008.dtsi | 33 ++++++++++++ .../arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 53 +++++++++++++++++++ .../arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 29 ++++++++++ 3 files changed, 115 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi index 62c4fdad0b60..553fa4ba1cd4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi @@ -44,6 +44,39 @@ i2c@c240000 { status = "okay"; }; + i2c@c250000 { + power-sensor@41 { + compatible = "ti,ina3221"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "CVB_ATX_12V"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@1 { + reg = <0x1>; + label = "CVB_ATX_3V3"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + label = "CVB_ATX_5V"; + shunt-resistor-micro-ohms = <2000>; + }; + }; + + power-sensor@44 { + compatible = "ti,ina219"; + reg = <0x44>; + shunt-resistor = <2000>; + }; + }; + rtc@c2a0000 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi index 5e7797df50c2..db6ef711674a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi @@ -1987,5 +1987,58 @@ interrupt-controller@2a40000 { status = "okay"; }; }; + + i2c@c240000 { + status = "okay"; + + power-sensor@40 { + compatible = "ti,ina3221"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "VDD_GPU_SOC"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@1 { + reg = <0x1>; + label = "VDD_CPU_CV"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + label = "VIN_SYS_5V0"; + shunt-resistor-micro-ohms = <2000>; + ti,summation-disable; + }; + }; + + power-sensor@41 { + compatible = "ti,ina3221"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + status = "disabled"; + }; + + input@1 { + reg = <0x1>; + label = "VDDQ_VDD2_1V8AO"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + status = "disabled"; + }; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi index fe08e131b7b9..59c14ded5e9f 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi @@ -55,6 +55,35 @@ padctl@3520000 { avdd-usb-supply = <&vdd_3v3_ao>; }; + i2c@c240000 { + status = "okay"; + + power-sensor@40 { + compatible = "ti,ina3221"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "VDD_IN"; + shunt-resistor-micro-ohms = <5000>; + }; + + input@1 { + reg = <0x1>; + label = "VDD_CPU_GPU_CV"; + shunt-resistor-micro-ohms = <5000>; + }; + + input@2 { + reg = <0x2>; + label = "VDD_SOC"; + shunt-resistor-micro-ohms = <5000>; + }; + }; + }; + rtc@c2a0000 { status = "okay"; };