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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2024 07:09:08.5065 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 383daf75-47d5-4ab2-8501-08dcd2f9cbbf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075EF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4130 - This document provide AMD side band IOCTL description defined for APML and its usage. Multiple AMD custom protocols defined for side band system management uses this IOCTL. User space C-APIs are made available by esmi_oob_library, hosted at https://github.com/amd/esmi_oob_library which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html. Signed-off-by: Akshay Gupta Reviewed-by: Naveen Krishna Chatradhi --- Changes since v2: - Address the review comments Changes since v2: - update the MACROS name as per feedback Changes since v1: - New patch Documentation/misc-devices/amd-sbi.rst | 84 ++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/misc-devices/amd-sbi.rst diff --git a/Documentation/misc-devices/amd-sbi.rst b/Documentation/misc-devices/amd-sbi.rst new file mode 100644 index 000000000000..6e2ba6fa323a --- /dev/null +++ b/Documentation/misc-devices/amd-sbi.rst @@ -0,0 +1,84 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +AMD SIDE BAND interface +======================= + +AMD server line of processors supports system management +functionality via side-band interface (SBI) called +Advanced Platform Management Link (APML). APML is an I2C/I3C +based 2-wire processor target interface. APML is used to +communicate with the Remote Management Interface +(SB Remote Management Interface (SB-RMI) +and SB Temperature Sensor Interface (SB-TSI)). + +More details on the interface can be found in chapter +"5 Advanced Platform Management Link (APML)" of the family/model PPR +Eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip + + +SBRMI device +============ + +apml_sbrmi driver under the drivers/misc/amd-sbi creates miscdevice +/dev/sbrmi-* to let user space programs run APML mailbox, CPUID, +MCAMSR and register xfer commands. + +Register sets is common across APML protocols. IOCTL is providing synchronization +among protocols as transactions may create race condition. + +$ ls -al /dev/sbrmi-3c +crw------- 1 root root 10, 53 Jul 10 11:13 /dev/sbrmi-3c + +apml_sbrmi driver registers hwmon sensors for monitoring power_cap_max, +current power consumption and managing power_cap. + +Characteristics of the dev node: + * message ids are defined to run differnet xfer protocols: + * Mailbox: 0x0 ... 0x999 + * CPUID: 0x1000 + * MCA_MSR: 0x1001 + * Register xfer: 0x1002 + +Access restrictions: + * Only root user is allowed to open the file. + * APML Mailbox messages and Register xfer access are read-write, + * CPUID and MCA_MSR access is read-only. + +Driver IOCTLs +============= + +.. c:macro:: SBRMI_IOCTL_CMD +.. kernel-dec:: include/uapi/misc/amd-apml.h + :doc: SBRMI_IOCTL_CMD + +User-space usage +================ + +To access side band interface from a C program. +First, user need to include the headers:: + + #include + +Which defines the supported IOCTL and data structure to be passed +from the user space. + +Next thing, open the device file, as follows:: + + int file; + + file = open("/dev/sbrmi-*", O_RDWR); + if (file < 0) { + /* ERROR HANDLING */ + exit(1); + } + +The following IOCTL is defined: + +``#define SB_BASE_IOCTL_NR 0xF9`` +``#define SBRMI_IOCTL_CMD _IOWR(SB_BASE_IOCTL_NR, 0, struct apml_message)`` + + +User space C-APIs are made available by esmi_oob_library, hosted at +https://github.com/amd/esmi_oob_library which is provided by the E-SMS +project https://www.amd.com/en/developer/e-sms.html.