diff mbox series

docs: Fix typo

Message ID 20241002105845.172101-1-kksurendran95@gmail.com (mailing list archive)
State Changes Requested
Headers show
Series docs: Fix typo | expand

Commit Message

KK Surendran Oct. 2, 2024, 10:58 a.m. UTC
Fix typo in Documentation/hwmon/max31827.rst -
"respresents" to "represents"

Signed-off-by: KK Surendran <kksurendran95@gmail.com>
---
 Documentation/hwmon/max31827.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Guenter Roeck Oct. 2, 2024, 1:40 p.m. UTC | #1
On 10/2/24 03:58, KK Surendran wrote:
> Fix typo in Documentation/hwmon/max31827.rst -
> "respresents" to "represents"
> 
> Signed-off-by: KK Surendran <kksurendran95@gmail.com>

Subject needs to include the affected subsystem.

Guenter

> ---
>   Documentation/hwmon/max31827.rst | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/hwmon/max31827.rst b/Documentation/hwmon/max31827.rst
> index 9c11a9518..4a7d12934 100644
> --- a/Documentation/hwmon/max31827.rst
> +++ b/Documentation/hwmon/max31827.rst
> @@ -136,7 +136,7 @@ PEC Support
>   
>   When reading a register value, the PEC byte is computed and sent by the chip.
>   
> -PEC on word data transaction respresents a signifcant increase in bandwitdh
> +PEC on word data transaction represents a signifcant increase in bandwitdh
>   usage (+33% for both write and reads) in normal conditions.
>   
>   Since this operation implies there will be an extra delay to each
diff mbox series

Patch

diff --git a/Documentation/hwmon/max31827.rst b/Documentation/hwmon/max31827.rst
index 9c11a9518..4a7d12934 100644
--- a/Documentation/hwmon/max31827.rst
+++ b/Documentation/hwmon/max31827.rst
@@ -136,7 +136,7 @@  PEC Support
 
 When reading a register value, the PEC byte is computed and sent by the chip.
 
-PEC on word data transaction respresents a signifcant increase in bandwitdh
+PEC on word data transaction represents a signifcant increase in bandwitdh
 usage (+33% for both write and reads) in normal conditions.
 
 Since this operation implies there will be an extra delay to each